From: Richard Henderson <richard.henderson@linaro.org>
To: Michael Clark <mjc@sifive.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
Palmer Dabbelt <palmer@sifive.com>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Subject: Re: [Qemu-devel] [PATCH 4/9] target/riscv: Introduce cpu_riscv_get_fcsr
Date: Thu, 17 May 2018 20:35:31 -0700 [thread overview]
Message-ID: <2c3a91f2-516d-7ca8-bdb5-99bbc37a0c1e@linaro.org> (raw)
In-Reply-To: <CAHNT7NuEQWdG8hxvGpJDCVk3RN=S=CVznM7xXyQm-S6D4FshfQ@mail.gmail.com>
On 05/17/2018 07:46 PM, Michael Clark wrote:
>
>
> On Fri, May 11, 2018 at 3:52 PM, Richard Henderson
> <richard.henderson@linaro.org <mailto:richard.henderson@linaro.org>> wrote:
>
> Cc: Michael Clark <mjc@sifive.com <mailto:mjc@sifive.com>>
> Cc: Palmer Dabbelt <palmer@sifive.com <mailto:palmer@sifive.com>>
> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu
> <mailto:sagark@eecs.berkeley.edu>>
> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de
> <mailto:kbastian@mail.uni-paderborn.de>>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org
> <mailto:richard.henderson@linaro.org>>
>
>
> I'm not against this change but it conflicts with changes in the riscv repo. I
> should post my patch queue to the list...
Ok, I'll drop this for now, and the dump of the FCSR in the next patch.
To be revisited once your csr reorg is upstream...
r~
next prev parent reply other threads:[~2018-05-18 3:35 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-11 3:52 [Qemu-devel] [PATCH 0/9] Honor CPU_DUMP_FPU Richard Henderson
2018-05-11 3:52 ` [Qemu-devel] [PATCH 1/9] target/alpha: " Richard Henderson
2018-05-13 0:48 ` Philippe Mathieu-Daudé
2018-05-11 3:52 ` [Qemu-devel] [PATCH 2/9] target/mips: " Richard Henderson
2018-05-13 0:49 ` Philippe Mathieu-Daudé
2018-05-11 3:52 ` [Qemu-devel] [PATCH 3/9] target/ppc: " Richard Henderson
2018-05-13 0:50 ` Philippe Mathieu-Daudé
2018-05-11 3:52 ` [Qemu-devel] [PATCH 4/9] target/riscv: Introduce cpu_riscv_get_fcsr Richard Henderson
2018-05-13 0:51 ` Philippe Mathieu-Daudé
2018-05-18 2:46 ` Michael Clark
2018-05-18 3:35 ` Richard Henderson [this message]
2018-05-11 3:52 ` [Qemu-devel] [PATCH 5/9] target/riscv: Honor CPU_DUMP_FPU Richard Henderson
2018-05-13 0:52 ` Philippe Mathieu-Daudé
2018-05-18 2:16 ` Michael Clark
2018-05-11 3:52 ` [Qemu-devel] [PATCH 6/9] target/s390x: " Richard Henderson
2018-05-11 6:57 ` David Hildenbrand
2018-05-11 3:52 ` [Qemu-devel] [PATCH 7/9] target/sparc: " Richard Henderson
2018-05-13 0:54 ` Philippe Mathieu-Daudé
2018-05-11 3:52 ` [Qemu-devel] [PATCH 8/9] target/unicore32: " Richard Henderson
2018-05-13 0:54 ` Philippe Mathieu-Daudé
2018-05-11 3:52 ` [Qemu-devel] [PATCH 9/9] target/xtensa: " Richard Henderson
2018-05-11 4:46 ` Max Filippov
2018-05-13 0:55 ` Philippe Mathieu-Daudé
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