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From: "Cédric Le Goater" <clg@kaod.org>
To: Frederic Barrat <fbarrat@linux.ibm.com>, <danielhb413@gmail.com>,
	<qemu-ppc@nongnu.org>, <qemu-devel@nongnu.org>
Subject: Re: [PATCH 1/3] ppc/pnv: Introduce a pnv-phb5 device to match root port
Date: Thu, 10 Mar 2022 17:16:27 +0100	[thread overview]
Message-ID: <2d028874-39c3-fd8b-3c6c-bb2c5ba233d9@kaod.org> (raw)
In-Reply-To: <20220310155101.294568-2-fbarrat@linux.ibm.com>

On 3/10/22 16:50, Frederic Barrat wrote:
> We already have the pnv-phb3 and pnv-phb4 devices for POWER8 and
> POWER9 respectively. POWER10 uses version 5 of the PHB. It is very
> close to the PHB4 from POWER9, at least in our model and we could
> almost keep using the PHB4 model. However the matching root port
> pnv-phb5-root-port is specific to POWER10 so to avoid confusion as
> well as making it easy to introduce differences later, we create a
> pnv-phb5 class, which is mostly an alias for pnv-phb4 for now.
> 
> With this patch, the command line for a user-created PHB on powernv10
> becomes:
>    -machine powernv10 -nodefaults -device pnv-phb5 -device pnv-phb5-root-port
> 
> Fixes: 623575e16cd5 ("ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge")
> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>

Reviewed-by: Cédric Le Goater <clg@kaod.org>

Queued for 7.0.

Thanks,

C.

> ---
>   hw/pci-host/pnv_phb4.c         | 7 +++++++
>   hw/pci-host/pnv_phb4_pec.c     | 9 +++++----
>   include/hw/pci-host/pnv_phb4.h | 5 +++++
>   3 files changed, 17 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
> index b5b384e9ee..d1a911f988 100644
> --- a/hw/pci-host/pnv_phb4.c
> +++ b/hw/pci-host/pnv_phb4.c
> @@ -1783,6 +1783,12 @@ static const TypeInfo pnv_phb4_type_info = {
>       }
>   };
>   
> +static const TypeInfo pnv_phb5_type_info = {
> +    .name          = TYPE_PNV_PHB5,
> +    .parent        = TYPE_PNV_PHB4,
> +    .instance_size = sizeof(PnvPHB4),
> +};
> +
>   static void pnv_phb4_root_bus_class_init(ObjectClass *klass, void *data)
>   {
>       BusClass *k = BUS_CLASS(klass);
> @@ -1907,6 +1913,7 @@ static void pnv_phb4_register_types(void)
>       type_register_static(&pnv_phb5_root_port_info);
>       type_register_static(&pnv_phb4_root_port_info);
>       type_register_static(&pnv_phb4_type_info);
> +    type_register_static(&pnv_phb5_type_info);
>       type_register_static(&pnv_phb4_iommu_memory_region_info);
>   }
>   
> diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
> index 0ab36e9c8f..a0dfa77c84 100644
> --- a/hw/pci-host/pnv_phb4_pec.c
> +++ b/hw/pci-host/pnv_phb4_pec.c
> @@ -116,7 +116,8 @@ static void pnv_pec_default_phb_realize(PnvPhb4PecState *pec,
>                                           int stack_no,
>                                           Error **errp)
>   {
> -    PnvPHB4 *phb = PNV_PHB4(qdev_new(TYPE_PNV_PHB4));
> +    PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec);
> +    PnvPHB4 *phb = PNV_PHB4(qdev_new(pecc->phb_type));
>       int phb_id = pnv_phb4_pec_get_phb_id(pec, stack_no);
>   
>       object_property_set_link(OBJECT(phb), "pec", OBJECT(pec),
> @@ -131,9 +132,7 @@ static void pnv_pec_default_phb_realize(PnvPhb4PecState *pec,
>       }
>   
>       /* Add a single Root port if running with defaults */
> -    pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb),
> -                             PNV_PHB4_PEC_GET_CLASS(pec)->rp_model);
> -
> +    pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb), pecc->rp_model);
>   }
>   
>   static void pnv_pec_realize(DeviceState *dev, Error **errp)
> @@ -265,6 +264,7 @@ static void pnv_pec_class_init(ObjectClass *klass, void *data)
>       pecc->stk_compat = stk_compat;
>       pecc->stk_compat_size = sizeof(stk_compat);
>       pecc->version = PNV_PHB4_VERSION;
> +    pecc->phb_type = TYPE_PNV_PHB4;
>       pecc->num_phbs = pnv_pec_num_phbs;
>       pecc->rp_model = TYPE_PNV_PHB4_ROOT_PORT;
>   }
> @@ -317,6 +317,7 @@ static void pnv_phb5_pec_class_init(ObjectClass *klass, void *data)
>       pecc->stk_compat = stk_compat;
>       pecc->stk_compat_size = sizeof(stk_compat);
>       pecc->version = PNV_PHB5_VERSION;
> +    pecc->phb_type = TYPE_PNV_PHB5;
>       pecc->num_phbs = pnv_phb5_pec_num_stacks;
>       pecc->rp_model = TYPE_PNV_PHB5_ROOT_PORT;
>   }
> diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
> index fbcf5bfb55..b02ecdceaa 100644
> --- a/include/hw/pci-host/pnv_phb4.h
> +++ b/include/hw/pci-host/pnv_phb4.h
> @@ -203,6 +203,7 @@ struct PnvPhb4PecClass {
>       const char *stk_compat;
>       int stk_compat_size;
>       uint64_t version;
> +    const char *phb_type;
>       const uint32_t *num_phbs;
>       const char *rp_model;
>   };
> @@ -211,6 +212,10 @@ struct PnvPhb4PecClass {
>    * POWER10 definitions
>    */
>   
> +#define TYPE_PNV_PHB5 "pnv-phb5"
> +#define PNV_PHB5(obj) \
> +    OBJECT_CHECK(PnvPhb4, (obj), TYPE_PNV_PHB5)
> +
>   #define PNV_PHB5_VERSION           0x000000a500000001ull
>   #define PNV_PHB5_DEVICE_ID         0x0652
>   
x	


  reply	other threads:[~2022-03-10 16:18 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-10 15:50 [PATCH 0/3] Fix user-created PHB devices on POWER10 Frederic Barrat
2022-03-10 15:50 ` [PATCH 1/3] ppc/pnv: Introduce a pnv-phb5 device to match root port Frederic Barrat
2022-03-10 16:16   ` Cédric Le Goater [this message]
2022-03-10 15:51 ` [PATCH 2/3] ppc/pnv: Fixes for user-created pnv-phb5 devices Frederic Barrat
2022-03-10 16:16   ` Cédric Le Goater
2022-03-10 15:51 ` [PATCH 3/3] ppc/pnv: Fix PEC lookup function for POWER10 Frederic Barrat
2022-03-10 16:17   ` Cédric Le Goater
2022-03-14 15:21 ` [PATCH 0/3] Fix user-created PHB devices on POWER10 Cédric Le Goater

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