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[173.197.107.21]) by smtp.gmail.com with ESMTPSA id t5sm1161137pjr.22.2021.01.11.20.54.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Jan 2021 20:54:57 -0800 (PST) Subject: Re: [RFC v3 08/16] target/riscv: add gen_shifti() and gen_shiftiw() helper functions To: frank.chang@sifive.com, qemu-devel@nongnu.org, qemu-riscv@nongnu.org References: <20210112022001.20521-1-frank.chang@sifive.com> <20210112022001.20521-9-frank.chang@sifive.com> From: Richard Henderson Message-ID: <2d0f3c27-8f0d-1386-7ab0-9e6e5e1a6c53@linaro.org> Date: Mon, 11 Jan 2021 18:54:54 -1000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210112022001.20521-9-frank.chang@sifive.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Sagar Karandikar , Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 1/11/21 4:19 PM, frank.chang@sifive.com wrote: > static bool trans_slli(DisasContext *ctx, arg_slli *a) > { > - if (a->shamt >= TARGET_LONG_BITS) { > - return false; > - } > - > if (a->rd != 0) { > - TCGv t = tcg_temp_new(); > - gen_get_gpr(t, a->rs1); > - > - tcg_gen_shli_tl(t, t, a->shamt); > - > - gen_set_gpr(a->rd, t); > - tcg_temp_free(t); > + return gen_shifti(ctx, a, tcg_gen_shl_tl); > } /* NOP otherwise */ > return true; > } > > static bool trans_srli(DisasContext *ctx, arg_srli *a) > { > - if (a->shamt >= TARGET_LONG_BITS) { > - return false; > - } > - > if (a->rd != 0) { > - TCGv t = tcg_temp_new(); > - gen_get_gpr(t, a->rs1); > - > - tcg_gen_shri_tl(t, t, a->shamt); > - gen_set_gpr(a->rd, t); > - tcg_temp_free(t); > + return gen_shifti(ctx, a, tcg_gen_shr_tl); > } /* NOP otherwise */ > return true; > } > > static bool trans_srai(DisasContext *ctx, arg_srai *a) > { > - if (a->shamt >= TARGET_LONG_BITS) { > - return false; > - } > - > if (a->rd != 0) { > - TCGv t = tcg_temp_new(); > - gen_get_gpr(t, a->rs1); > - > - tcg_gen_sari_tl(t, t, a->shamt); > - gen_set_gpr(a->rd, t); > - tcg_temp_free(t); > + return gen_shifti(ctx, a, tcg_gen_sar_tl); > } /* NOP otherwise */ > return true; > } This removes the illegal instruction check for rd == 0. In general you don't need the rd != 0 check, because gen_set_gpr will handle it (and it'll be exceedingly rare, and therefore not worth checking by hand). r~