[PATCH for-9.1 v5 0/3] kvm: add support for guest physical bits

[PATCH for-9.1 v5 0/3] kvm: add support for guest physical bits

[Paolo Bonzini]

The adjustments based on Gerd' v4 patches are small, the main change
is the introduction of ABI-compatible machine types for 9.0 so that the
new property is only available on 9.1.

Gerd Hoffmann (2):
  target/i386: add guest-phys-bits cpu property
  kvm: add support for guest physical bits

Paolo Bonzini (1):
  hw: Add compat machines for 9.1

 include/hw/boards.h        |  3 +++
 include/hw/i386/pc.h       |  3 +++
 target/i386/cpu.h          |  1 +
 hw/arm/virt.c              | 11 +++++++++--
 hw/core/machine.c          |  3 +++
 hw/i386/pc.c               |  5 +++++
 hw/i386/pc_piix.c          | 17 ++++++++++++++---
 hw/i386/pc_q35.c           | 14 ++++++++++++--
 hw/m68k/virt.c             | 11 +++++++++--
 hw/ppc/spapr.c             | 17 ++++++++++++++---
 hw/s390x/s390-virtio-ccw.c | 14 +++++++++++++-
 target/i386/cpu.c          | 22 ++++++++++++++++++++++
 target/i386/kvm/kvm-cpu.c  | 34 +++++++++++++++++++++++++++++++++-
 13 files changed, 141 insertions(+), 14 deletions(-)

-- 
2.44.0

[PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1

[Paolo Bonzini]

Add 9.1 machine types for arm/i440fx/m68k/q35/s390x/spapr.

Cc: Cornelia Huck <cohuck@redhat.com>
Cc: Thomas Huth <thuth@redhat.com>
Cc: Harsh Prateek Bora <harshpb@linux.ibm.com>
Cc: Gavin Shan <gshan@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 include/hw/boards.h        |  3 +++
 include/hw/i386/pc.h       |  3 +++
 hw/arm/virt.c              | 11 +++++++++--
 hw/core/machine.c          |  3 +++
 hw/i386/pc.c               |  3 +++
 hw/i386/pc_piix.c          | 17 ++++++++++++++---
 hw/i386/pc_q35.c           | 14 ++++++++++++--
 hw/m68k/virt.c             | 11 +++++++++--
 hw/ppc/spapr.c             | 17 ++++++++++++++---
 hw/s390x/s390-virtio-ccw.c | 14 +++++++++++++-
 10 files changed, 83 insertions(+), 13 deletions(-)

diff --git a/include/hw/boards.h b/include/hw/boards.h
index 8b8f6d5c00d..50e0cf4278e 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -425,6 +425,9 @@ struct MachineState {
     } \
     type_init(machine_initfn##_register_types)
 
+extern GlobalProperty hw_compat_9_0[];
+extern const size_t hw_compat_9_0_len;
+
 extern GlobalProperty hw_compat_8_2[];
 extern const size_t hw_compat_8_2_len;
 
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 27a68071d77..349f79df086 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -198,6 +198,9 @@ void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
 /* sgx.c */
 void pc_machine_init_sgx_epc(PCMachineState *pcms);
 
+extern GlobalProperty pc_compat_9_0[];
+extern const size_t pc_compat_9_0_len;
+
 extern GlobalProperty pc_compat_8_2[];
 extern const size_t pc_compat_8_2_len;
 
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a9a913aeadb..c9119ef3847 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -3223,10 +3223,17 @@ static void machvirt_machine_init(void)
 }
 type_init(machvirt_machine_init);
 
-static void virt_machine_9_0_options(MachineClass *mc)
+static void virt_machine_9_1_options(MachineClass *mc)
 {
 }
-DEFINE_VIRT_MACHINE_AS_LATEST(9, 0)
+DEFINE_VIRT_MACHINE_AS_LATEST(9, 1)
+
+static void virt_machine_9_0_options(MachineClass *mc)
+{
+    virt_machine_9_1_options(mc);
+    compat_props_add(mc->compat_props, hw_compat_9_0, hw_compat_9_0_len);
+}
+DEFINE_VIRT_MACHINE(9, 0)
 
 static void virt_machine_8_2_options(MachineClass *mc)
 {
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 37ede0e7d4f..a92bec23147 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -33,6 +33,9 @@
 #include "hw/virtio/virtio-iommu.h"
 #include "audio/audio.h"
 
+GlobalProperty hw_compat_9_0[] = {};
+const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0);
+
 GlobalProperty hw_compat_8_2[] = {
     { "migration", "zero-page-detection", "legacy"},
     { TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" },
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index e80f02bef41..461fcaa1b48 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -78,6 +78,9 @@
     { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
     { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
 
+GlobalProperty pc_compat_9_0[] = {};
+const size_t pc_compat_9_0_len = G_N_ELEMENTS(pc_compat_9_0);
+
 GlobalProperty pc_compat_8_2[] = {};
 const size_t pc_compat_8_2_len = G_N_ELEMENTS(pc_compat_8_2);
 
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 18ba0766092..8850c49c66a 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -513,13 +513,26 @@ static void pc_i440fx_machine_options(MachineClass *m)
                                      "Use a different south bridge than PIIX3");
 }
 
-static void pc_i440fx_9_0_machine_options(MachineClass *m)
+static void pc_i440fx_9_1_machine_options(MachineClass *m)
 {
     pc_i440fx_machine_options(m);
     m->alias = "pc";
     m->is_default = true;
 }
 
+DEFINE_I440FX_MACHINE(v9_1, "pc-i440fx-9.1", NULL,
+                      pc_i440fx_9_1_machine_options);
+
+static void pc_i440fx_9_0_machine_options(MachineClass *m)
+{
+    pc_i440fx_9_1_machine_options(m);
+    m->alias = NULL;
+    m->is_default = false;
+
+    compat_props_add(m->compat_props, hw_compat_9_0, hw_compat_9_0_len);
+    compat_props_add(m->compat_props, pc_compat_9_0, pc_compat_9_0_len);
+}
+
 DEFINE_I440FX_MACHINE(v9_0, "pc-i440fx-9.0", NULL,
                       pc_i440fx_9_0_machine_options);
 
@@ -528,8 +541,6 @@ static void pc_i440fx_8_2_machine_options(MachineClass *m)
     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 
     pc_i440fx_9_0_machine_options(m);
-    m->alias = NULL;
-    m->is_default = false;
 
     compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len);
     compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len);
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index c7bc8a2041f..6e1180d4b60 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -365,12 +365,23 @@ static void pc_q35_machine_options(MachineClass *m)
                      pc_q35_compat_defaults, pc_q35_compat_defaults_len);
 }
 
-static void pc_q35_9_0_machine_options(MachineClass *m)
+static void pc_q35_9_1_machine_options(MachineClass *m)
 {
     pc_q35_machine_options(m);
     m->alias = "q35";
 }
 
+DEFINE_Q35_MACHINE(v9_1, "pc-q35-9.1", NULL,
+                   pc_q35_9_1_machine_options);
+
+static void pc_q35_9_0_machine_options(MachineClass *m)
+{
+    pc_q35_9_1_machine_options(m);
+    m->alias = NULL;
+    compat_props_add(m->compat_props, hw_compat_9_0, hw_compat_9_0_len);
+    compat_props_add(m->compat_props, pc_compat_9_0, pc_compat_9_0_len);
+}
+
 DEFINE_Q35_MACHINE(v9_0, "pc-q35-9.0", NULL,
                    pc_q35_9_0_machine_options);
 
@@ -378,7 +389,6 @@ static void pc_q35_8_2_machine_options(MachineClass *m)
 {
     PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
     pc_q35_9_0_machine_options(m);
-    m->alias = NULL;
     m->max_cpus = 1024;
     compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len);
     compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len);
diff --git a/hw/m68k/virt.c b/hw/m68k/virt.c
index b8e5e102e6b..09bc9bdfefb 100644
--- a/hw/m68k/virt.c
+++ b/hw/m68k/virt.c
@@ -357,10 +357,17 @@ type_init(virt_machine_register_types)
     } \
     type_init(machvirt_machine_##major##_##minor##_init);
 
-static void virt_machine_9_0_options(MachineClass *mc)
+static void virt_machine_9_1_options(MachineClass *mc)
 {
 }
-DEFINE_VIRT_MACHINE(9, 0, true)
+DEFINE_VIRT_MACHINE(9, 1, true)
+
+static void virt_machine_9_0_options(MachineClass *mc)
+{
+    virt_machine_9_1_options(mc);
+    compat_props_add(mc->compat_props, hw_compat_9_0, hw_compat_9_0_len);
+}
+DEFINE_VIRT_MACHINE(9, 0, false)
 
 static void virt_machine_8_2_options(MachineClass *mc)
 {
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index c417f9dd523..ab0cf496d61 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -4805,14 +4805,25 @@ static void spapr_machine_latest_class_options(MachineClass *mc)
     type_init(spapr_machine_register_##suffix)
 
 /*
- * pseries-9.0
+ * pseries-9.1
  */
-static void spapr_machine_9_0_class_options(MachineClass *mc)
+static void spapr_machine_9_1_class_options(MachineClass *mc)
 {
     /* Defaults for the latest behaviour inherited from the base class */
 }
 
-DEFINE_SPAPR_MACHINE(9_0, "9.0", true);
+DEFINE_SPAPR_MACHINE(9_1, "9.1", true);
+
+/*
+ * pseries-9.0
+ */
+static void spapr_machine_9_0_class_options(MachineClass *mc)
+{
+    spapr_machine_9_1_class_options(mc);
+    compat_props_add(mc->compat_props, hw_compat_9_0, hw_compat_9_0_len);
+}
+
+DEFINE_SPAPR_MACHINE(9_0, "9.0", false);
 
 /*
  * pseries-8.2
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index b1dcb3857f0..67e8b0b05e8 100644
--- a/hw/s390x/s390-virtio-ccw.c
+++ b/hw/s390x/s390-virtio-ccw.c
@@ -859,14 +859,26 @@ bool css_migration_enabled(void)
     }                                                                         \
     type_init(ccw_machine_register_##suffix)
 
+static void ccw_machine_9_1_instance_options(MachineState *machine)
+{
+}
+
+static void ccw_machine_9_1_class_options(MachineClass *mc)
+{
+}
+DEFINE_CCW_MACHINE(9_0, "9.1", true);
+
 static void ccw_machine_9_0_instance_options(MachineState *machine)
 {
+    ccw_machine_9_1_instance_options(machine);
 }
 
 static void ccw_machine_9_0_class_options(MachineClass *mc)
 {
+    ccw_machine_9_1_class_options(machine);
+    compat_props_add(mc->compat_props, hw_compat_9_0, hw_compat_9_0_len);
 }
-DEFINE_CCW_MACHINE(9_0, "9.0", true);
+DEFINE_CCW_MACHINE(9_0, "9.0", false);
 
 static void ccw_machine_8_2_instance_options(MachineState *machine)
 {
-- 
2.44.0

Re: [PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1

[Cornelia Huck]

On Mon, Mar 25 2024, Paolo Bonzini <pbonzini@redhat.com> wrote:

> Add 9.1 machine types for arm/i440fx/m68k/q35/s390x/spapr.
>
> Cc: Cornelia Huck <cohuck@redhat.com>
> Cc: Thomas Huth <thuth@redhat.com>
> Cc: Harsh Prateek Bora <harshpb@linux.ibm.com>
> Cc: Gavin Shan <gshan@redhat.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  include/hw/boards.h        |  3 +++
>  include/hw/i386/pc.h       |  3 +++
>  hw/arm/virt.c              | 11 +++++++++--
>  hw/core/machine.c          |  3 +++
>  hw/i386/pc.c               |  3 +++
>  hw/i386/pc_piix.c          | 17 ++++++++++++++---
>  hw/i386/pc_q35.c           | 14 ++++++++++++--
>  hw/m68k/virt.c             | 11 +++++++++--
>  hw/ppc/spapr.c             | 17 ++++++++++++++---
>  hw/s390x/s390-virtio-ccw.c | 14 +++++++++++++-
>  10 files changed, 83 insertions(+), 13 deletions(-)

Reviewed-by: Cornelia Huck <cohuck@redhat.com>

Re: [PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1

[Thomas Huth]

On 25/03/2024 15.14, Paolo Bonzini wrote:
> Add 9.1 machine types for arm/i440fx/m68k/q35/s390x/spapr.
> 
> Cc: Cornelia Huck <cohuck@redhat.com>
> Cc: Thomas Huth <thuth@redhat.com>
> Cc: Harsh Prateek Bora <harshpb@linux.ibm.com>
> Cc: Gavin Shan <gshan@redhat.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>   include/hw/boards.h        |  3 +++
>   include/hw/i386/pc.h       |  3 +++
>   hw/arm/virt.c              | 11 +++++++++--
>   hw/core/machine.c          |  3 +++
>   hw/i386/pc.c               |  3 +++
>   hw/i386/pc_piix.c          | 17 ++++++++++++++---
>   hw/i386/pc_q35.c           | 14 ++++++++++++--
>   hw/m68k/virt.c             | 11 +++++++++--
>   hw/ppc/spapr.c             | 17 ++++++++++++++---
>   hw/s390x/s390-virtio-ccw.c | 14 +++++++++++++-
>   10 files changed, 83 insertions(+), 13 deletions(-)
....
> diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
> index b1dcb3857f0..67e8b0b05e8 100644
> --- a/hw/s390x/s390-virtio-ccw.c
> +++ b/hw/s390x/s390-virtio-ccw.c
> @@ -859,14 +859,26 @@ bool css_migration_enabled(void)
>       }                                                                         \
>       type_init(ccw_machine_register_##suffix)
>   
> +static void ccw_machine_9_1_instance_options(MachineState *machine)
> +{
> +}
> +
> +static void ccw_machine_9_1_class_options(MachineClass *mc)
> +{
> +}
> +DEFINE_CCW_MACHINE(9_0, "9.1", true);
> +
>   static void ccw_machine_9_0_instance_options(MachineState *machine)
>   {
> +    ccw_machine_9_1_instance_options(machine);
>   }
>   
>   static void ccw_machine_9_0_class_options(MachineClass *mc)
>   {
> +    ccw_machine_9_1_class_options(machine);
> +    compat_props_add(mc->compat_props, hw_compat_9_0, hw_compat_9_0_len);
>   }
> -DEFINE_CCW_MACHINE(9_0, "9.0", true);
> +DEFINE_CCW_MACHINE(9_0, "9.0", false);
>   
>   static void ccw_machine_8_2_instance_options(MachineState *machine)
>   {

For s390x:
Acked-by: Thomas Huth <thuth@redhat.com>

Re: [PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1

[Harsh Prateek Bora]

On 3/25/24 19:44, Paolo Bonzini wrote:
> Add 9.1 machine types for arm/i440fx/m68k/q35/s390x/spapr.
> 
> Cc: Cornelia Huck <cohuck@redhat.com>
> Cc: Thomas Huth <thuth@redhat.com>
> Cc: Harsh Prateek Bora <harshpb@linux.ibm.com>
> Cc: Gavin Shan <gshan@redhat.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>   include/hw/boards.h        |  3 +++
>   include/hw/i386/pc.h       |  3 +++
>   hw/arm/virt.c              | 11 +++++++++--
>   hw/core/machine.c          |  3 +++
>   hw/i386/pc.c               |  3 +++
>   hw/i386/pc_piix.c          | 17 ++++++++++++++---
>   hw/i386/pc_q35.c           | 14 ++++++++++++--
>   hw/m68k/virt.c             | 11 +++++++++--
>   hw/ppc/spapr.c             | 17 ++++++++++++++---

For spapr:
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>

>   hw/s390x/s390-virtio-ccw.c | 14 +++++++++++++-
>   10 files changed, 83 insertions(+), 13 deletions(-)
> 
> diff --git a/include/hw/boards.h b/include/hw/boards.h
> index 8b8f6d5c00d..50e0cf4278e 100644
> --- a/include/hw/boards.h
> +++ b/include/hw/boards.h
> @@ -425,6 +425,9 @@ struct MachineState {
>       } \
>       type_init(machine_initfn##_register_types)
>   
> +extern GlobalProperty hw_compat_9_0[];
> +extern const size_t hw_compat_9_0_len;
> +
>   extern GlobalProperty hw_compat_8_2[];
>   extern const size_t hw_compat_8_2_len;
>   
> diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
> index 27a68071d77..349f79df086 100644
> --- a/include/hw/i386/pc.h
> +++ b/include/hw/i386/pc.h
> @@ -198,6 +198,9 @@ void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
>   /* sgx.c */
>   void pc_machine_init_sgx_epc(PCMachineState *pcms);
>   
> +extern GlobalProperty pc_compat_9_0[];
> +extern const size_t pc_compat_9_0_len;
> +
>   extern GlobalProperty pc_compat_8_2[];
>   extern const size_t pc_compat_8_2_len;
>   
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index a9a913aeadb..c9119ef3847 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -3223,10 +3223,17 @@ static void machvirt_machine_init(void)
>   }
>   type_init(machvirt_machine_init);
>   
> -static void virt_machine_9_0_options(MachineClass *mc)
> +static void virt_machine_9_1_options(MachineClass *mc)
>   {
>   }
> -DEFINE_VIRT_MACHINE_AS_LATEST(9, 0)
> +DEFINE_VIRT_MACHINE_AS_LATEST(9, 1)
> +
> +static void virt_machine_9_0_options(MachineClass *mc)
> +{
> +    virt_machine_9_1_options(mc);
> +    compat_props_add(mc->compat_props, hw_compat_9_0, hw_compat_9_0_len);
> +}
> +DEFINE_VIRT_MACHINE(9, 0)
>   
>   static void virt_machine_8_2_options(MachineClass *mc)
>   {
> diff --git a/hw/core/machine.c b/hw/core/machine.c
> index 37ede0e7d4f..a92bec23147 100644
> --- a/hw/core/machine.c
> +++ b/hw/core/machine.c
> @@ -33,6 +33,9 @@
>   #include "hw/virtio/virtio-iommu.h"
>   #include "audio/audio.h"
>   
> +GlobalProperty hw_compat_9_0[] = {};
> +const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0);
> +
>   GlobalProperty hw_compat_8_2[] = {
>       { "migration", "zero-page-detection", "legacy"},
>       { TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" },
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index e80f02bef41..461fcaa1b48 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -78,6 +78,9 @@
>       { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
>       { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
>   
> +GlobalProperty pc_compat_9_0[] = {};
> +const size_t pc_compat_9_0_len = G_N_ELEMENTS(pc_compat_9_0);
> +
>   GlobalProperty pc_compat_8_2[] = {};
>   const size_t pc_compat_8_2_len = G_N_ELEMENTS(pc_compat_8_2);
>   
> diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
> index 18ba0766092..8850c49c66a 100644
> --- a/hw/i386/pc_piix.c
> +++ b/hw/i386/pc_piix.c
> @@ -513,13 +513,26 @@ static void pc_i440fx_machine_options(MachineClass *m)
>                                        "Use a different south bridge than PIIX3");
>   }
>   
> -static void pc_i440fx_9_0_machine_options(MachineClass *m)
> +static void pc_i440fx_9_1_machine_options(MachineClass *m)
>   {
>       pc_i440fx_machine_options(m);
>       m->alias = "pc";
>       m->is_default = true;
>   }
>   
> +DEFINE_I440FX_MACHINE(v9_1, "pc-i440fx-9.1", NULL,
> +                      pc_i440fx_9_1_machine_options);
> +
> +static void pc_i440fx_9_0_machine_options(MachineClass *m)
> +{
> +    pc_i440fx_9_1_machine_options(m);
> +    m->alias = NULL;
> +    m->is_default = false;
> +
> +    compat_props_add(m->compat_props, hw_compat_9_0, hw_compat_9_0_len);
> +    compat_props_add(m->compat_props, pc_compat_9_0, pc_compat_9_0_len);
> +}
> +
>   DEFINE_I440FX_MACHINE(v9_0, "pc-i440fx-9.0", NULL,
>                         pc_i440fx_9_0_machine_options);
>   
> @@ -528,8 +541,6 @@ static void pc_i440fx_8_2_machine_options(MachineClass *m)
>       PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
>   
>       pc_i440fx_9_0_machine_options(m);
> -    m->alias = NULL;
> -    m->is_default = false;
>   
>       compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len);
>       compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len);
> diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
> index c7bc8a2041f..6e1180d4b60 100644
> --- a/hw/i386/pc_q35.c
> +++ b/hw/i386/pc_q35.c
> @@ -365,12 +365,23 @@ static void pc_q35_machine_options(MachineClass *m)
>                        pc_q35_compat_defaults, pc_q35_compat_defaults_len);
>   }
>   
> -static void pc_q35_9_0_machine_options(MachineClass *m)
> +static void pc_q35_9_1_machine_options(MachineClass *m)
>   {
>       pc_q35_machine_options(m);
>       m->alias = "q35";
>   }
>   
> +DEFINE_Q35_MACHINE(v9_1, "pc-q35-9.1", NULL,
> +                   pc_q35_9_1_machine_options);
> +
> +static void pc_q35_9_0_machine_options(MachineClass *m)
> +{
> +    pc_q35_9_1_machine_options(m);
> +    m->alias = NULL;
> +    compat_props_add(m->compat_props, hw_compat_9_0, hw_compat_9_0_len);
> +    compat_props_add(m->compat_props, pc_compat_9_0, pc_compat_9_0_len);
> +}
> +
>   DEFINE_Q35_MACHINE(v9_0, "pc-q35-9.0", NULL,
>                      pc_q35_9_0_machine_options);
>   
> @@ -378,7 +389,6 @@ static void pc_q35_8_2_machine_options(MachineClass *m)
>   {
>       PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
>       pc_q35_9_0_machine_options(m);
> -    m->alias = NULL;
>       m->max_cpus = 1024;
>       compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len);
>       compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len);
> diff --git a/hw/m68k/virt.c b/hw/m68k/virt.c
> index b8e5e102e6b..09bc9bdfefb 100644
> --- a/hw/m68k/virt.c
> +++ b/hw/m68k/virt.c
> @@ -357,10 +357,17 @@ type_init(virt_machine_register_types)
>       } \
>       type_init(machvirt_machine_##major##_##minor##_init);
>   
> -static void virt_machine_9_0_options(MachineClass *mc)
> +static void virt_machine_9_1_options(MachineClass *mc)
>   {
>   }
> -DEFINE_VIRT_MACHINE(9, 0, true)
> +DEFINE_VIRT_MACHINE(9, 1, true)
> +
> +static void virt_machine_9_0_options(MachineClass *mc)
> +{
> +    virt_machine_9_1_options(mc);
> +    compat_props_add(mc->compat_props, hw_compat_9_0, hw_compat_9_0_len);
> +}
> +DEFINE_VIRT_MACHINE(9, 0, false)
>   
>   static void virt_machine_8_2_options(MachineClass *mc)
>   {
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index c417f9dd523..ab0cf496d61 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -4805,14 +4805,25 @@ static void spapr_machine_latest_class_options(MachineClass *mc)
>       type_init(spapr_machine_register_##suffix)
>   
>   /*
> - * pseries-9.0
> + * pseries-9.1
>    */
> -static void spapr_machine_9_0_class_options(MachineClass *mc)
> +static void spapr_machine_9_1_class_options(MachineClass *mc)
>   {
>       /* Defaults for the latest behaviour inherited from the base class */
>   }
>   
> -DEFINE_SPAPR_MACHINE(9_0, "9.0", true);
> +DEFINE_SPAPR_MACHINE(9_1, "9.1", true);
> +
> +/*
> + * pseries-9.0
> + */
> +static void spapr_machine_9_0_class_options(MachineClass *mc)
> +{
> +    spapr_machine_9_1_class_options(mc);
> +    compat_props_add(mc->compat_props, hw_compat_9_0, hw_compat_9_0_len);
> +}
> +
> +DEFINE_SPAPR_MACHINE(9_0, "9.0", false);
>   
>   /*
>    * pseries-8.2
> diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
> index b1dcb3857f0..67e8b0b05e8 100644
> --- a/hw/s390x/s390-virtio-ccw.c
> +++ b/hw/s390x/s390-virtio-ccw.c
> @@ -859,14 +859,26 @@ bool css_migration_enabled(void)
>       }                                                                         \
>       type_init(ccw_machine_register_##suffix)
>   
> +static void ccw_machine_9_1_instance_options(MachineState *machine)
> +{
> +}
> +
> +static void ccw_machine_9_1_class_options(MachineClass *mc)
> +{
> +}
> +DEFINE_CCW_MACHINE(9_0, "9.1", true);
> +
>   static void ccw_machine_9_0_instance_options(MachineState *machine)
>   {
> +    ccw_machine_9_1_instance_options(machine);
>   }
>   
>   static void ccw_machine_9_0_class_options(MachineClass *mc)
>   {
> +    ccw_machine_9_1_class_options(machine);
> +    compat_props_add(mc->compat_props, hw_compat_9_0, hw_compat_9_0_len);
>   }
> -DEFINE_CCW_MACHINE(9_0, "9.0", true);
> +DEFINE_CCW_MACHINE(9_0, "9.0", false);
>   
>   static void ccw_machine_8_2_instance_options(MachineState *machine)
>   {

Re: [PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1

[Zhao Liu]

On Mon, Mar 25, 2024 at 03:14:20PM +0100, Paolo Bonzini wrote:
> Date: Mon, 25 Mar 2024 15:14:20 +0100
> From: Paolo Bonzini <pbonzini@redhat.com>
> Subject: [PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1
> X-Mailer: git-send-email 2.44.0
> 
> Add 9.1 machine types for arm/i440fx/m68k/q35/s390x/spapr.
> 
> Cc: Cornelia Huck <cohuck@redhat.com>
> Cc: Thomas Huth <thuth@redhat.com>
> Cc: Harsh Prateek Bora <harshpb@linux.ibm.com>
> Cc: Gavin Shan <gshan@redhat.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  include/hw/boards.h        |  3 +++
>  include/hw/i386/pc.h       |  3 +++
>  hw/arm/virt.c              | 11 +++++++++--
>  hw/core/machine.c          |  3 +++
>  hw/i386/pc.c               |  3 +++
>  hw/i386/pc_piix.c          | 17 ++++++++++++++---
>  hw/i386/pc_q35.c           | 14 ++++++++++++--
>  hw/m68k/virt.c             | 11 +++++++++--
>  hw/ppc/spapr.c             | 17 ++++++++++++++---
>  hw/s390x/s390-virtio-ccw.c | 14 +++++++++++++-
>  10 files changed, 83 insertions(+), 13 deletions(-)
>

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>

Re: [PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1

[Zhao Liu]

Hi Paolo,

Just meet typos when compiling ;-)

On Mon, Mar 25, 2024 at 03:14:20PM +0100, Paolo Bonzini wrote:
> Date: Mon, 25 Mar 2024 15:14:20 +0100
> From: Paolo Bonzini <pbonzini@redhat.com>
> Subject: [PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1
> X-Mailer: git-send-email 2.44.0

[snip]

> diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
> index b1dcb3857f0..67e8b0b05e8 100644
> --- a/hw/s390x/s390-virtio-ccw.c
> +++ b/hw/s390x/s390-virtio-ccw.c
> @@ -859,14 +859,26 @@ bool css_migration_enabled(void)
>      }                                                                         \
>      type_init(ccw_machine_register_##suffix)
>  
> +static void ccw_machine_9_1_instance_options(MachineState *machine)
> +{
> +}
> +
> +static void ccw_machine_9_1_class_options(MachineClass *mc)
> +{
> +}
> +DEFINE_CCW_MACHINE(9_0, "9.1", true);

Should be:

DEFINE_CCW_MACHINE(9_1, "9.1", true);

> +
>  static void ccw_machine_9_0_instance_options(MachineState *machine)
>  {
> +    ccw_machine_9_1_instance_options(machine);
>  }
>  
>  static void ccw_machine_9_0_class_options(MachineClass *mc)
>  {
> +    ccw_machine_9_1_class_options(machine);

s/machine/mc/

Regards,
Zhao

Re: [PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1

[Paolo Bonzini]

On Thu, Mar 28, 2024 at 11:07 AM Zhao Liu <zhao1.liu@intel.com> wrote:
>
> Hi Paolo,
>
> Just meet typos when compiling ;-)

Thank you very much! Fixed both.

Paolo

> On Mon, Mar 25, 2024 at 03:14:20PM +0100, Paolo Bonzini wrote:
> > Date: Mon, 25 Mar 2024 15:14:20 +0100
> > From: Paolo Bonzini <pbonzini@redhat.com>
> > Subject: [PATCH for-9.1 v5 1/3] hw: Add compat machines for 9.1
> > X-Mailer: git-send-email 2.44.0
>
> [snip]
>
> > diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
> > index b1dcb3857f0..67e8b0b05e8 100644
> > --- a/hw/s390x/s390-virtio-ccw.c
> > +++ b/hw/s390x/s390-virtio-ccw.c
> > @@ -859,14 +859,26 @@ bool css_migration_enabled(void)
> >      }                                                                         \
> >      type_init(ccw_machine_register_##suffix)
> >
> > +static void ccw_machine_9_1_instance_options(MachineState *machine)
> > +{
> > +}
> > +
> > +static void ccw_machine_9_1_class_options(MachineClass *mc)
> > +{
> > +}
> > +DEFINE_CCW_MACHINE(9_0, "9.1", true);
>
> Should be:
>
> DEFINE_CCW_MACHINE(9_1, "9.1", true);
>
> > +
> >  static void ccw_machine_9_0_instance_options(MachineState *machine)
> >  {
> > +    ccw_machine_9_1_instance_options(machine);
> >  }
> >
> >  static void ccw_machine_9_0_class_options(MachineClass *mc)
> >  {
> > +    ccw_machine_9_1_class_options(machine);
>
> s/machine/mc/
>
> Regards,
> Zhao
>

[PATCH for-9.1 v5 2/3] target/i386: add guest-phys-bits cpu property

[Paolo Bonzini]

From: Gerd Hoffmann <kraxel@redhat.com>

Allows to set guest-phys-bits (cpuid leaf 80000008, eax[23:16])
via -cpu $model,guest-phys-bits=$nr.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-ID: <20240318155336.156197-3-kraxel@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
v4->v5:
- move here all non-KVM parts
- add compat property and support for special value "-1" (accelerator
  defines value)

 target/i386/cpu.h |  1 +
 hw/i386/pc.c      |  4 +++-
 target/i386/cpu.c | 22 ++++++++++++++++++++++
 3 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 6b057380791..83e47358451 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2026,6 +2026,7 @@ struct ArchCPU {
 
     /* Number of physical address bits supported */
     uint32_t phys_bits;
+    uint32_t guest_phys_bits;
 
     /* in order to simplify APIC support, we leave this pointer to the
        user */
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 461fcaa1b48..9c4b3969cc8 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -78,7 +78,9 @@
     { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
     { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
 
-GlobalProperty pc_compat_9_0[] = {};
+GlobalProperty pc_compat_9_0[] = {
+    { TYPE_X86_CPU, "guest-phys-bits", "0" },
+};
 const size_t pc_compat_9_0_len = G_N_ELEMENTS(pc_compat_9_0);
 
 GlobalProperty pc_compat_8_2[] = {};
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 33760a2ee16..eef3d08473e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6570,6 +6570,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
         if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
             /* 64 bit processor */
              *eax |= (cpu_x86_virtual_addr_width(env) << 8);
+             *eax |= (cpu->guest_phys_bits << 16);
         }
         *ebx = env->features[FEAT_8000_0008_EBX];
         if (cs->nr_cores * cs->nr_threads > 1) {
@@ -7329,6 +7330,14 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
         goto out;
     }
 
+    if (cpu->guest_phys_bits == -1) {
+        /*
+         * If it was not set by the user, or by the accelerator via
+         * cpu_exec_realizefn, clear.
+         */
+        cpu->guest_phys_bits = 0;
+    }
+
     if (cpu->ucode_rev == 0) {
         /*
          * The default is the same as KVM's. Note that this check
@@ -7379,6 +7388,14 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
         if (cpu->phys_bits == 0) {
             cpu->phys_bits = TCG_PHYS_ADDR_BITS;
         }
+        if (cpu->guest_phys_bits &&
+            (cpu->guest_phys_bits > cpu->phys_bits ||
+            cpu->guest_phys_bits < 32)) {
+            error_setg(errp, "guest-phys-bits should be between 32 and %u "
+                             " (but is %u)",
+                             cpu->phys_bits, cpu->guest_phys_bits);
+            return;
+        }
     } else {
         /* For 32 bit systems don't use the user set value, but keep
          * phys_bits consistent with what we tell the guest.
@@ -7387,6 +7404,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
             error_setg(errp, "phys-bits is not user-configurable in 32 bit");
             return;
         }
+        if (cpu->guest_phys_bits != 0) {
+            error_setg(errp, "guest-phys-bits is not user-configurable in 32 bit");
+            return;
+        }
 
         if (env->features[FEAT_1_EDX] & (CPUID_PSE36 | CPUID_PAE)) {
             cpu->phys_bits = 36;
@@ -7887,6 +7908,7 @@ static Property x86_cpu_properties[] = {
     DEFINE_PROP_BOOL("x-force-features", X86CPU, force_features, false),
     DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true),
     DEFINE_PROP_UINT32("phys-bits", X86CPU, phys_bits, 0),
+    DEFINE_PROP_UINT32("guest-phys-bits", X86CPU, guest_phys_bits, -1),
     DEFINE_PROP_BOOL("host-phys-bits", X86CPU, host_phys_bits, false),
     DEFINE_PROP_UINT8("host-phys-bits-limit", X86CPU, host_phys_bits_limit, 0),
     DEFINE_PROP_BOOL("fill-mtrr-mask", X86CPU, fill_mtrr_mask, true),
-- 
2.44.0

Re: [PATCH for-9.1 v5 2/3] target/i386: add guest-phys-bits cpu property

[Xiaoyao Li]

On 3/25/2024 10:14 PM, Paolo Bonzini wrote:
> From: Gerd Hoffmann <kraxel@redhat.com>
> 
> Allows to set guest-phys-bits (cpuid leaf 80000008, eax[23:16])
> via -cpu $model,guest-phys-bits=$nr.
> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> Message-ID: <20240318155336.156197-3-kraxel@redhat.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>

> ---
> v4->v5:
> - move here all non-KVM parts
> - add compat property and support for special value "-1" (accelerator
>    defines value)
> 
>   target/i386/cpu.h |  1 +
>   hw/i386/pc.c      |  4 +++-
>   target/i386/cpu.c | 22 ++++++++++++++++++++++
>   3 files changed, 26 insertions(+), 1 deletion(-)
> 
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 6b057380791..83e47358451 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -2026,6 +2026,7 @@ struct ArchCPU {
>   
>       /* Number of physical address bits supported */
>       uint32_t phys_bits;
> +    uint32_t guest_phys_bits;
>   
>       /* in order to simplify APIC support, we leave this pointer to the
>          user */
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 461fcaa1b48..9c4b3969cc8 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -78,7 +78,9 @@
>       { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
>       { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
>   
> -GlobalProperty pc_compat_9_0[] = {};
> +GlobalProperty pc_compat_9_0[] = {
> +    { TYPE_X86_CPU, "guest-phys-bits", "0" },
> +};
>   const size_t pc_compat_9_0_len = G_N_ELEMENTS(pc_compat_9_0);
>   
>   GlobalProperty pc_compat_8_2[] = {};
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 33760a2ee16..eef3d08473e 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -6570,6 +6570,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
>           if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
>               /* 64 bit processor */
>                *eax |= (cpu_x86_virtual_addr_width(env) << 8);
> +             *eax |= (cpu->guest_phys_bits << 16);
>           }
>           *ebx = env->features[FEAT_8000_0008_EBX];
>           if (cs->nr_cores * cs->nr_threads > 1) {
> @@ -7329,6 +7330,14 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
>           goto out;
>       }
>   
> +    if (cpu->guest_phys_bits == -1) {
> +        /*
> +         * If it was not set by the user, or by the accelerator via
> +         * cpu_exec_realizefn, clear.
> +         */
> +        cpu->guest_phys_bits = 0;
> +    }
> +
>       if (cpu->ucode_rev == 0) {
>           /*
>            * The default is the same as KVM's. Note that this check
> @@ -7379,6 +7388,14 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
>           if (cpu->phys_bits == 0) {
>               cpu->phys_bits = TCG_PHYS_ADDR_BITS;
>           }
> +        if (cpu->guest_phys_bits &&
> +            (cpu->guest_phys_bits > cpu->phys_bits ||
> +            cpu->guest_phys_bits < 32)) {
> +            error_setg(errp, "guest-phys-bits should be between 32 and %u "
> +                             " (but is %u)",
> +                             cpu->phys_bits, cpu->guest_phys_bits);
> +            return;
> +        }
>       } else {
>           /* For 32 bit systems don't use the user set value, but keep
>            * phys_bits consistent with what we tell the guest.
> @@ -7387,6 +7404,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
>               error_setg(errp, "phys-bits is not user-configurable in 32 bit");
>               return;
>           }
> +        if (cpu->guest_phys_bits != 0) {
> +            error_setg(errp, "guest-phys-bits is not user-configurable in 32 bit");
> +            return;
> +        }
>   
>           if (env->features[FEAT_1_EDX] & (CPUID_PSE36 | CPUID_PAE)) {
>               cpu->phys_bits = 36;
> @@ -7887,6 +7908,7 @@ static Property x86_cpu_properties[] = {
>       DEFINE_PROP_BOOL("x-force-features", X86CPU, force_features, false),
>       DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true),
>       DEFINE_PROP_UINT32("phys-bits", X86CPU, phys_bits, 0),
> +    DEFINE_PROP_UINT32("guest-phys-bits", X86CPU, guest_phys_bits, -1),
>       DEFINE_PROP_BOOL("host-phys-bits", X86CPU, host_phys_bits, false),
>       DEFINE_PROP_UINT8("host-phys-bits-limit", X86CPU, host_phys_bits_limit, 0),
>       DEFINE_PROP_BOOL("fill-mtrr-mask", X86CPU, fill_mtrr_mask, true),

Re: [PATCH for-9.1 v5 2/3] target/i386: add guest-phys-bits cpu property

[Zhao Liu]

Hi Paolo,

On Mon, Mar 25, 2024 at 03:14:21PM +0100, Paolo Bonzini wrote:
> Date: Mon, 25 Mar 2024 15:14:21 +0100
> From: Paolo Bonzini <pbonzini@redhat.com>
> Subject: [PATCH for-9.1 v5 2/3] target/i386: add guest-phys-bits cpu
>  property
> X-Mailer: git-send-email 2.44.0
> 
> From: Gerd Hoffmann <kraxel@redhat.com>
> 
> Allows to set guest-phys-bits (cpuid leaf 80000008, eax[23:16])
> via -cpu $model,guest-phys-bits=$nr.
> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> Message-ID: <20240318155336.156197-3-kraxel@redhat.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> v4->v5:
> - move here all non-KVM parts
> - add compat property and support for special value "-1" (accelerator
>   defines value)
> 
>  target/i386/cpu.h |  1 +
>  hw/i386/pc.c      |  4 +++-
>  target/i386/cpu.c | 22 ++++++++++++++++++++++
>  3 files changed, 26 insertions(+), 1 deletion(-)
> 
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 6b057380791..83e47358451 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -2026,6 +2026,7 @@ struct ArchCPU {
>  
>      /* Number of physical address bits supported */
>      uint32_t phys_bits;
> +    uint32_t guest_phys_bits;

Maybe here it deserves a comment, just as most any other fields...what
about copying commit message of patch 3 like:

/*
 * Number of guest physical address bits supported. Usually this is
 * identical to host physical address bits. With NPT or EPT being used
 * this might be restricted to 48 (max 4-level paging address space
 * size) even if the host cpu supports more physical address bits.
 */

Otherwise,

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>

[PATCH for-9.1 v5 3/3] kvm: add support for guest physical bits

[Paolo Bonzini]

From: Gerd Hoffmann <kraxel@redhat.com>

Query kvm for supported guest physical address bits, in cpuid
function 80000008, eax[23:16].  Usually this is identical to host
physical address bits.  With NPT or EPT being used this might be
restricted to 48 (max 4-level paging address space size) even if
the host cpu supports more physical address bits.

When set pass this to the guest, using cpuid too.  Guest firmware
can use this to figure how big the usable guest physical address
space is, so PCI bar mapping are actually reachable.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-ID: <20240318155336.156197-2-kraxel@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
v4->v5:
- only call new function if cpu->guest_phys_bits == -1
- guard more precisely the upper bound of cpu->guest_phys_bits

 target/i386/kvm/kvm-cpu.c | 34 +++++++++++++++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
index 9c791b7b052..e6b7a46743b 100644
--- a/target/i386/kvm/kvm-cpu.c
+++ b/target/i386/kvm/kvm-cpu.c
@@ -18,10 +18,32 @@
 #include "kvm_i386.h"
 #include "hw/core/accel-cpu.h"
 
+static void kvm_set_guest_phys_bits(CPUState *cs)
+{
+    X86CPU *cpu = X86_CPU(cs);
+    uint32_t eax, guest_phys_bits;
+
+    eax = kvm_arch_get_supported_cpuid(cs->kvm_state, 0x80000008, 0, R_EAX);
+    guest_phys_bits = (eax >> 16) & 0xff;
+    if (!guest_phys_bits) {
+        return;
+    }
+    cpu->guest_phys_bits = guest_phys_bits;
+    if (cpu->guest_phys_bits > cpu->phys_bits) {
+        cpu->guest_phys_bits = cpu->phys_bits;
+    }
+
+    if (cpu->host_phys_bits && cpu->host_phys_bits_limit &&
+        cpu->guest_phys_bits > cpu->host_phys_bits_limit) {
+        cpu->guest_phys_bits = cpu->host_phys_bits_limit;
+    }
+}
+
 static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
 {
     X86CPU *cpu = X86_CPU(cs);
     CPUX86State *env = &cpu->env;
+    bool ret;
 
     /*
      * The realize order is important, since x86_cpu_realize() checks if
@@ -50,7 +72,17 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
                                                    MSR_IA32_UCODE_REV);
         }
     }
-    return host_cpu_realizefn(cs, errp);
+    ret = host_cpu_realizefn(cs, errp);
+    if (!ret) {
+        return ret;
+    }
+
+    if ((env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) &&
+        cpu->guest_phys_bits == -1) {
+        kvm_set_guest_phys_bits(cs);
+    }
+
+    return true;
 }
 
 static bool lmce_supported(void)
-- 
2.44.0

Re: [PATCH for-9.1 v5 3/3] kvm: add support for guest physical bits

[Zhao Liu]

Hi Paolo,

On Mon, Mar 25, 2024 at 03:14:22PM +0100, Paolo Bonzini wrote:
> Date: Mon, 25 Mar 2024 15:14:22 +0100
> From: Paolo Bonzini <pbonzini@redhat.com>
> Subject: [PATCH for-9.1 v5 3/3] kvm: add support for guest physical bits
> X-Mailer: git-send-email 2.44.0

[snip]

>  static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
>  {
>      X86CPU *cpu = X86_CPU(cs);
>      CPUX86State *env = &cpu->env;
> +    bool ret;
>  
>      /*
>       * The realize order is important, since x86_cpu_realize() checks if
> @@ -50,7 +72,17 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
>                                                     MSR_IA32_UCODE_REV);
>          }
>      }
> -    return host_cpu_realizefn(cs, errp);
> +    ret = host_cpu_realizefn(cs, errp);
> +    if (!ret) {
> +        return ret;
> +    }
> +
> +    if ((env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) &&
> +        cpu->guest_phys_bits == -1) {
> +        kvm_set_guest_phys_bits(cs);
> +    }
> +
> +    return true;
>  }
>

Just nit, it seems the comment about "realize order" in
kvm_cpu_realizefn() should also be updated to include this new
kvm_set_guest_phys_bits().

Or, I feel the guest_phys_bits could also be set in host_cpu_realizefn()
since it also indicates the host support.

Anyway, this won't affect this current series. LGTM,

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>