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Tue, 13 Feb 2024 08:32:36 -0800 (PST) Message-ID: <2e230b9f-728c-4c25-b58a-a1a9f8dae62e@linaro.org> Date: Tue, 13 Feb 2024 17:32:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 00/11] target/mips: Remove I6500 CPU definition Content-Language: en-US To: qemu-devel@nongnu.org Cc: Thomas Huth , Aurelien Jarno , Laurent Vivier , Jiaxun Yang , Paolo Bonzini , Peter Maydell , Huacai Chen , Richard Henderson , Aleksandar Rikalo References: <20240209090513.9401-1-philmd@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20240209090513.9401-1-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 9/2/24 10:05, Philippe Mathieu-Daudé wrote: > Alternative to: > https://lore.kernel.org/qemu-devel/20240209085347.8446-1-philmd@linaro.org/ > If the I6500 can not be tested or its support is incomplete, > there is no point in wasting energy maintaining it. > > Philippe Mathieu-Daudé (11): > target/mips: Remove helpers accessing SAAR registers > hw/misc/mips: Reduce itc_reconfigure() scope > target/mips: Remove MIPSITUState::itu field > target/mips: Remove CPUMIPSState::saarp field > hw/misc/mips_itu: Remove MIPSITUState::cpu0 field > hw/misc/mips_itu: Remove MIPSITUState::saar field > target/mips: Remove CPUMIPSState::CP0_SAAR[2] field > target/mips: Remove helpers accessing SAARI register > target/mips: Remove CPUMIPSState::CP0_SAARI field > target/mips: Remove the unused DisasContext::saar field Patches 1-10 queued (without removing the I6500 CPU).