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([2a01:e0a:59e:9d80:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4264a1d169dsm167318375e9.5.2024.07.08.06.27.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Jul 2024 06:27:41 -0700 (PDT) Message-ID: <2e9dd97d-6e67-41f1-a8a2-71c90b163c56@redhat.com> Date: Mon, 8 Jul 2024 15:27:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 07/19] hw/arm/smmu: Introduce CACHED_ENTRY_TO_ADDR Content-Language: en-US To: Jean-Philippe Brucker , Mostafa Saleh Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org, qemu-devel@nongnu.org, alex.bennee@linaro.org, maz@kernel.org, nicolinc@nvidia.com, julien@xen.org, richard.henderson@linaro.org, marcin.juszkiewicz@linaro.org References: <20240701110241.2005222-1-smostafa@google.com> <20240701110241.2005222-8-smostafa@google.com> <20240704180438.GD1693268@myrica> From: Eric Auger In-Reply-To: <20240704180438.GD1693268@myrica> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.142, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Mostafa, On 7/4/24 20:04, Jean-Philippe Brucker wrote: > On Mon, Jul 01, 2024 at 11:02:29AM +0000, Mostafa Saleh wrote: >> Soon, smmuv3_do_translate() will be used to translate the CD and the >> TTBx, instead of re-writting the same logic to convert the returned >> cached entry to an address, add a new macro CACHED_ENTRY_TO_ADDR. >> >> Signed-off-by: Mostafa Saleh >> --- >> hw/arm/smmuv3.c | 3 +-- >> include/hw/arm/smmu-common.h | 3 +++ >> 2 files changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c >> index cc61708160..229b3c388c 100644 >> --- a/hw/arm/smmuv3.c >> +++ b/hw/arm/smmuv3.c >> @@ -950,8 +950,7 @@ epilogue: >> switch (status) { >> case SMMU_TRANS_SUCCESS: >> entry.perm = cached_entry->entry.perm; >> - entry.translated_addr = cached_entry->entry.translated_addr + >> - (addr & cached_entry->entry.addr_mask); >> + entry.translated_addr = CACHED_ENTRY_TO_ADDR(cached_entry, addr); >> entry.addr_mask = cached_entry->entry.addr_mask; >> trace_smmuv3_translate_success(mr->parent_obj.name, sid, addr, >> entry.translated_addr, entry.perm, >> diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h >> index 96eb017e50..09d3b9e734 100644 >> --- a/include/hw/arm/smmu-common.h >> +++ b/include/hw/arm/smmu-common.h >> @@ -37,6 +37,9 @@ >> #define VMSA_IDXMSK(isz, strd, lvl) ((1ULL << \ >> VMSA_BIT_LVL(isz, strd, lvl)) - 1) >> >> +#define CACHED_ENTRY_TO_ADDR(ent, addr) (ent)->entry.translated_addr + \ >> + ((addr) & (ent)->entry.addr_mask); > nit: maybe wrap this in parenthesis to avoid future usage mistakes and > drop the semicolon With Jean's comments taken into account, Reviewed-by: Eric Auger Eric > > Thanks, > Jean > >> + >> /* >> * Page table walk error types >> */ >> -- >> 2.45.2.803.g4e1b14247a-goog >>