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From: Remi Denis Courmont <remi.denis.courmont@huawei.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>, QEMU Developers <qemu-devel@nongnu.org>
Subject: RE: [PATCH 01/14] target/arm: add arm_is_el2_enabled() helper
Date: Mon, 2 Nov 2020 13:35:04 +0000	[thread overview]
Message-ID: <2ea39469edfc4968b706826aa63a44c8@huawei.com> (raw)
In-Reply-To: <CAFEAcA8xrk1Yd3GbkYRMjBwGjZ-f7bSp4gHGGk=tkhKNk5CqRQ@mail.gmail.com>

Hi,

> I replied to this before the cover letter explaining what the series
> is doing arrived in my inbox, so the second part of my suggestion
> would be a bit pointless. The first part (mentioning the name of
> the pseudocode function) still seems worth doing.

Yeah well, some spam filter seems to helped itself to the original cover letter, had to resend it, so I figured.

And then it seems I made a booboo and accidentally dropped the first patch in the series, handling HCR.{F,I}MO bits.



  reply	other threads:[~2020-11-02 13:38 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <2172054.ElGaqSPkdT@basile.remlab.net>
2020-11-02 10:57 ` [PATCH 01/14] target/arm: add arm_is_el2_enabled() helper remi.denis.courmont
2020-11-02 11:06   ` Peter Maydell
2020-11-02 11:27     ` Peter Maydell
2020-11-02 13:35       ` Remi Denis Courmont [this message]
2020-11-03 16:42   ` Richard Henderson
2020-11-02 10:57 ` [PATCH 02/14] target/arm: use arm_is_el2_enabled() where applicable remi.denis.courmont
2020-11-03 16:53   ` Richard Henderson
2020-11-02 10:57 ` [PATCH 03/14] target/arm: use arm_hcr_el2_eff() " remi.denis.courmont
2020-11-03 16:56   ` Richard Henderson
2020-11-02 10:57 ` [PATCH 04/14] target/arm: factor MDCR_EL2 common handling remi.denis.courmont
2020-11-03 17:00   ` Richard Henderson
2020-11-02 10:57 ` [PATCH 05/14] target/arm: declare new AA64PFR0 bit-fields remi.denis.courmont
2020-11-03 17:02   ` Richard Henderson
2020-11-02 10:57 ` [PATCH 06/14] target/arm: add 64-bit S-EL2 to EL exception table remi.denis.courmont
2020-11-02 10:57 ` [PATCH 07/14] target/arm: return the stage 2 index for stage 1 remi.denis.courmont
2020-11-03 17:04   ` Richard Henderson
2020-11-02 10:57 ` [PATCH 08/14] target/arm: add MMU stage 1 for Secure EL2 remi.denis.courmont
2020-11-03 18:32   ` Richard Henderson
2020-11-03 18:49     ` Rémi Denis-Courmont
2020-11-03 19:41       ` Richard Henderson
2020-11-02 10:57 ` [PATCH 09/14] target/arm: add ARMv8.4-SEL2 system registers remi.denis.courmont
2020-11-03 19:49   ` Richard Henderson
2020-11-03 21:09     ` Peter Maydell
2020-11-03 21:40       ` Richard Henderson
2020-11-02 10:57 ` [PATCH 10/14] target/arm: do S1_ptw_translate() before address space lookup remi.denis.courmont
2020-11-03 19:54   ` Richard Henderson
2020-11-03 21:21     ` Rémi Denis-Courmont
2020-11-02 10:57 ` [PATCH 11/14] target/arm: secure stage 2 translation regime remi.denis.courmont
2020-11-02 10:58 ` [PATCH 12/14] target/arm: set HPFAR_EL2.NS on secure stage 2 faults remi.denis.courmont
2020-11-02 10:58 ` [PATCH 13/14] target/arm: add ARMv8.4-SEL2 extension remi.denis.courmont
2020-11-03 20:14   ` Richard Henderson
2020-11-02 10:58 ` [PATCH 14/14] target/arm: enable Secure EL2 in max CPU remi.denis.courmont
2020-11-03  7:38   ` Rémi Denis-Courmont
2020-11-03 16:38     ` Richard Henderson
2020-11-03 20:15   ` Richard Henderson

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