From: Thomas Huth <thuth@redhat.com>
To: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Laurent Vivier" <lvivier@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Troy Lee <troy_lee@aspeedtech.com>,
Yunlin Tang <yunlin.tang@aspeedtech.com>
Subject: Re: [PATCH v4 7/7] hw/gpio/aspeed: Add test case for AST2700
Date: Fri, 27 Sep 2024 11:22:49 +0200 [thread overview]
Message-ID: <2ed19b27-bd81-4782-9c8b-910443a16d7b@redhat.com> (raw)
In-Reply-To: <SI2PR06MB504163D471738C1A07960F7AFC6B2@SI2PR06MB5041.apcprd06.prod.outlook.com>
On 27/09/2024 10.12, Jamin Lin wrote:
> Hi Cedric,
>
>> Subject: [PATCH v4 7/7] hw/gpio/aspeed: Add test case for AST2700
>>
>> Add test case to test GPIO output and input pins from A0 to D7 for AST2700.
>>
>> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
>> ---
>> tests/qtest/aspeed_gpio-test.c | 64 ++++++++++++++++++++++++++++++++++
>> 1 file changed, 64 insertions(+)
>>
>> diff --git a/tests/qtest/aspeed_gpio-test.c b/tests/qtest/aspeed_gpio-test.c
>> index d38f51d719..8ae42a8da5 100644
>> --- a/tests/qtest/aspeed_gpio-test.c
>> +++ b/tests/qtest/aspeed_gpio-test.c
>> @@ -33,6 +33,10 @@
>> #define GPIO_ABCD_DATA_VALUE 0x000
>> #define GPIO_ABCD_DIRECTION 0x004
>>
>> +/* AST2700 */
>> +#define AST2700_GPIO_BASE 0x14C0B000
>> +#define GPIOA0_CONTROL 0x180
>> +
>> static void test_set_colocated_pins(const void *data) {
>> QTestState *s = (QTestState *)data; @@ -72,6 +76,61 @@ static void
>> test_set_input_pins(const void *data)
>> g_assert_cmphex(value, ==, 0xffffffff); }
>>
>> +static void test_2700_output_pins(const void *data) {
>> + QTestState *s = (QTestState *)data;
>> + uint32_t offset = 0;
>> + uint32_t value = 0;
>> + uint32_t pin = 0;
>> +
>> + for (char c = 'A'; c <= 'D'; c++) {
>> + for (int i = 0; i < 8; i++) {
>> + offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
>> +
>> + /* output direction and output hi */
>> + qtest_writel(s, offset, 0x00000003);
>> + value = qtest_readl(s, offset);
>> + g_assert_cmphex(value, ==, 0x00000003);
>> +
>> + /* output direction and output low */
>> + qtest_writel(s, offset, 0x00000002);
>> + value = qtest_readl(s, offset);
>> + g_assert_cmphex(value, ==, 0x00000002);
>> + pin++;
>> + }
>> + }
>> +}
>> +
>> +static void test_2700_input_pins(const void *data) {
>> + QTestState *s = (QTestState *)data;
>> + char name[16];
>> + uint32_t offset = 0;
>> + uint32_t value = 0;
>> + uint32_t pin = 0;
>> +
>> + for (char c = 'A'; c <= 'D'; c++) {
>> + for (int i = 0; i < 8; i++) {
>> + sprintf(name, "gpio%c%d", c, i);
>> + offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
>> + /* input direction */
>> + qtest_writel(s, offset, 0);
>> +
>> + /* set input */
>> + qtest_qom_set_bool(s, "/machine/soc/gpio", name, true);
>> + value = qtest_readl(s, offset);
>> + g_assert_cmphex(value, ==, 0x00002000);
>> +
>> + /* clear input */
>> + qtest_qom_set_bool(s, "/machine/soc/gpio", name, false);
>> + value = qtest_readl(s, offset);
>> + g_assert_cmphex(value, ==, 0);
>> + pin++;
>> + }
>> + }
>> +}
>> +
>> +
>> int main(int argc, char **argv)
>> {
>> QTestState *s;
>> @@ -83,6 +142,11 @@ int main(int argc, char **argv)
>> qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
>> test_set_colocated_pins);
>> qtest_add_data_func("/ast2600/gpio/set_input_pins", s,
>> test_set_input_pins);
>> +
>> + s = qtest_init("-machine ast2700-evb");
>> + qtest_add_data_func("/ast2700/gpio/input_pins", s,
>> test_2700_input_pins);
>> + qtest_add_data_func("/ast2700/gpio/out_pins", s,
>> + test_2700_output_pins);
>> +
>> r = g_test_run();
>> qtest_quit(s);
>>
> It seems I need to check arch for AST2700 to fix the following errors.
>
> int main(int argc, char **argv)
> {
> const char *arch = qtest_get_arch();
> QTestState *s;
> int r;
>
> g_test_init(&argc, &argv, NULL);
>
> s = qtest_init("-machine ast2600-evb");
> qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
> test_set_colocated_pins);
> qtest_add_data_func("/ast2600/gpio/set_input_pins", s, test_set_input_pins);
>
> if (strcmp(arch, "aarch64") == 0) {
> s = qtest_init("-machine ast2700-evb");
> qtest_add_data_func("/ast2700/gpio/input_pins",
> s, test_2700_input_pins);
> qtest_add_data_func("/ast2700/gpio/out_pins", s, test_2700_output_pins);
> }
>
> r = g_test_run();
> qtest_quit(s);
>
> return r;
> }
>
> qemu-system-arm: unsupported machine type: "ast2700-evb"
> Use -machine help to list supported machines
If ast2700 is aarch64 only, you rather might need to put the test into a
separate file, since aspeed_gpio-test.c is for the 32-bit arm machines only,
isn't it? (see tests/qtest/meson.build)
Thomas
prev parent reply other threads:[~2024-09-27 9:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-27 7:31 [PATCH v4 0/7] Support GPIO for AST2700 Jamin Lin via
2024-09-27 7:31 ` [PATCH v4 1/7] hw/gpio/aspeed: Fix coding style Jamin Lin via
2024-09-27 7:31 ` [PATCH v4 2/7] hw/gpio/aspeed: Support to set the different memory size Jamin Lin via
2024-09-27 7:31 ` [PATCH v4 3/7] hw/gpio/aspeed: Support different memory region ops Jamin Lin via
2024-09-27 7:31 ` [PATCH v4 4/7] hw/gpio/aspeed: Fix clear incorrect interrupt status for GPIO index mode Jamin Lin via
2024-09-27 7:31 ` [PATCH v4 5/7] hw/gpio/aspeed: Add AST2700 support Jamin Lin via
2024-09-27 7:31 ` [PATCH v4 6/7] aspeed/soc: Support GPIO for AST2700 and correct irq 130 Jamin Lin via
2024-09-27 7:31 ` [PATCH v4 7/7] hw/gpio/aspeed: Add test case for AST2700 Jamin Lin via
2024-09-27 8:12 ` Jamin Lin
2024-09-27 9:22 ` Thomas Huth [this message]
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