From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48245) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bB2zA-0000gz-Oo for qemu-devel@nongnu.org; Thu, 09 Jun 2016 12:39:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bB2z4-0008Ec-Ii for qemu-devel@nongnu.org; Thu, 09 Jun 2016 12:39:11 -0400 Received: from mail-qk0-x243.google.com ([2607:f8b0:400d:c09::243]:33195) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bB2z4-0008EN-FL for qemu-devel@nongnu.org; Thu, 09 Jun 2016 12:39:06 -0400 Received: by mail-qk0-x243.google.com with SMTP id u63so3386315qkh.0 for ; Thu, 09 Jun 2016 09:39:06 -0700 (PDT) Sender: Richard Henderson References: <146436485327.18188.3967167989618604187.stgit@fimbulvetr.bsc.es> <146436486494.18188.15144006426115209070.stgit@fimbulvetr.bsc.es> From: Richard Henderson Message-ID: <2f35097d-8c9c-1679-b074-6b17a3c7e38f@twiddle.net> Date: Thu, 9 Jun 2016 09:39:02 -0700 MIME-Version: 1.0 In-Reply-To: <146436486494.18188.15144006426115209070.stgit@fimbulvetr.bsc.es> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v4 2/2] trace: [all] Add "guest_mem_before" event List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Llu=c3=ads_Vilanova?= , qemu-devel@nongnu.org Cc: Peter Maydell , Stefan Hajnoczi , Paolo Bonzini , Peter Crosthwaite On 05/27/2016 09:01 AM, LluĂ­s Vilanova wrote: > -void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop) > +static inline void do_tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, > + TCGMemOp memop) > { > memop = tcg_canonicalize_memop(memop, 0, 0); > gen_ldst_i32(INDEX_op_qemu_ld_i32, val, addr, memop, idx); > } > > -void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop) > +void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop) > +{ > + trace_guest_mem_before_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, > + addr, trace_mem_get_info(memop, 0)); > + do_tcg_gen_qemu_ld_i32(val, addr, idx, memop); > +} ... > void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop) > { > + trace_guest_mem_before_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, > + addr, trace_mem_get_info(memop, 0)); > + > if (TCG_TARGET_REG_BITS == 32 && (memop & MO_SIZE) < MO_64) { > - tcg_gen_qemu_ld_i32(TCGV_LOW(val), addr, idx, memop); > + do_tcg_gen_qemu_ld_i32(TCGV_LOW(val), addr, idx, memop); > if (memop & MO_SIGN) { > tcg_gen_sari_i32(TCGV_HIGH(val), TCGV_LOW(val), 31); > } else { I think the better solution here is to move the tracing for 64-bit operations below this IF, rather than fiddling around with inline functions et al. r~