Re: [PULL 28/30] Hexagon HVX (tests/tcg/hexagon) hvx_misc test

[Richard Henderson <richard.henderson@linaro.org>]

On 11/1/21 6:33 AM, Philippe Mathieu-Daudé wrote:
> On 10/31/21 17:43, Taylor Simpson wrote:
>> Tests for
>>      packet semantics
>>      vector loads (aligned and unaligned)
>>      vector stores (aligned and unaligned)
>>      vector masked stores
>>      vector new value store
>>      maximum HVX temps in a packet
>>      vector operations
>>
>> Acked-by: Richard Henderson <richard.henderson@linaro.org>
>> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
>> ---
>>   tests/tcg/hexagon/hvx_misc.c      | 469 ++++++++++++++++++++++++++++++++++++++
>>   tests/tcg/hexagon/Makefile.target |   2 +
>>   2 files changed, 471 insertions(+)
>>   create mode 100644 tests/tcg/hexagon/hvx_misc.c
> 
>> +static void test_load_tmp(void)
>> +{
>> +    void *p0 = buffer0;
>> +    void *p1 = buffer1;
>> +    void *pout = output;
>> +
>> +    for (int i = 0; i < BUFSIZE; i++) {
>> +        /*
>> +         * Load into v12 as .tmp, then use it in the next packet
>> +         * Should get the new value within the same packet and
>> +         * the old value in the next packet
>> +         */
>> +        asm("v3 = vmem(%0 + #0)\n\t"
>> +            "r1 = #1\n\t"
>> +            "v12 = vsplat(r1)\n\t"
>> +            "{\n\t"
>> +            "    v12.tmp = vmem(%1 + #0)\n\t"
>> +            "    v4.w = vadd(v12.w, v3.w)\n\t"
>> +            "}\n\t"
>> +            "v4.w = vadd(v4.w, v12.w)\n\t"
>> +            "vmem(%2 + #0) = v4\n\t"
>> +            : : "r"(p0), "r"(p1), "r"(pout)
>> +            : "r1", "v12", "v3", "v4", "v6", "memory");
>> +        p0 += sizeof(MMVector);
>> +        p1 += sizeof(MMVector);
>> +        pout += sizeof(MMVector);
>> +
>> +        for (int j = 0; j < MAX_VEC_SIZE_BYTES / 4; j++) {
>> +            expect[i].w[j] = buffer0[i].w[j] + buffer1[i].w[j] + 1;
>> +        }
>> +    }
>> +
>> +    check_output_w(__LINE__, BUFSIZE);
>> +}
> 
> This test fails guest-tests:
> 
> tests/tcg/hexagon/hvx_misc.c:111:21: error: unknown register name 'v12'
> in asm
>              : "r1", "v12", "v3", "v4", "v6", "memory");
>                      ^
> tests/tcg/hexagon/hvx_misc.c:362:9: note: expanded from macro 'TEST_VEC_OP2'
>          VEC_OP2(ASM, EL, p0, p1, pout); \
>          ^
> 

Yep, this PR depends on the toolchain update that's pending.
I'll ask Alex to hurry up the docker patch queue.


r~