Re: [PATCH 1/8] hw/pci-host/designware: Declare CPU QOM types using DEFINE_TYPES() macro

[Gustavo Romero <gustavo.romero@linaro.org>]

Hi Phil,

On 10/12/23 9:18 AM, Philippe Mathieu-Daudé wrote:
> When multiple QOM types are registered in the same file,
> it is simpler to use the the DEFINE_TYPES() macro. In
> particular because type array declared with such macro
> are easier to review.
> 
> Remove a pointless structure declaration in "designware.h".
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   include/hw/pci-host/designware.h |  2 --
>   hw/pci-host/designware.c         | 39 ++++++++++++++------------------
>   2 files changed, 17 insertions(+), 24 deletions(-)
> 
> diff --git a/include/hw/pci-host/designware.h b/include/hw/pci-host/designware.h
> index 908f3d946b..c484e377a8 100644
> --- a/include/hw/pci-host/designware.h
> +++ b/include/hw/pci-host/designware.h
> @@ -31,8 +31,6 @@ OBJECT_DECLARE_SIMPLE_TYPE(DesignwarePCIEHost, DESIGNWARE_PCIE_HOST)
>   #define TYPE_DESIGNWARE_PCIE_ROOT "designware-pcie-root"
>   OBJECT_DECLARE_SIMPLE_TYPE(DesignwarePCIERoot, DESIGNWARE_PCIE_ROOT)
>   
> -struct DesignwarePCIERoot;
> -
>   typedef struct DesignwarePCIEViewport {
>       DesignwarePCIERoot *root;
>   
> diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c
> index 6f5442f108..304eca1b5c 100644
> --- a/hw/pci-host/designware.c
> +++ b/hw/pci-host/designware.c
> @@ -746,28 +746,23 @@ static void designware_pcie_host_init(Object *obj)
>       qdev_prop_set_bit(DEVICE(root), "multifunction", false);
>   }
>   
> -static const TypeInfo designware_pcie_root_info = {
> -    .name = TYPE_DESIGNWARE_PCIE_ROOT,
> -    .parent = TYPE_PCI_BRIDGE,
> -    .instance_size = sizeof(DesignwarePCIERoot),
> -    .class_init = designware_pcie_root_class_init,
> -    .interfaces = (InterfaceInfo[]) {
> -        { INTERFACE_PCIE_DEVICE },
> -        { }
> +static const TypeInfo designware_pcie_types[] = {
> +    {
> +        .name           = TYPE_DESIGNWARE_PCIE_HOST,
> +        .parent         = TYPE_PCI_HOST_BRIDGE,
> +        .instance_size  = sizeof(DesignwarePCIEHost),
> +        .instance_init  = designware_pcie_host_init,
> +        .class_init     = designware_pcie_host_class_init,
> +    }, {
> +        .name           = TYPE_DESIGNWARE_PCIE_ROOT,
> +        .parent         = TYPE_PCI_BRIDGE,
> +        .instance_size  = sizeof(DesignwarePCIERoot),
> +        .class_init     = designware_pcie_root_class_init,
> +        .interfaces     = (InterfaceInfo[]) {
> +            { INTERFACE_PCIE_DEVICE },
> +            { }
> +        },
>       },
>   };
>   
> -static const TypeInfo designware_pcie_host_info = {
> -    .name       = TYPE_DESIGNWARE_PCIE_HOST,
> -    .parent     = TYPE_PCI_HOST_BRIDGE,
> -    .instance_size = sizeof(DesignwarePCIEHost),
> -    .instance_init = designware_pcie_host_init,
> -    .class_init = designware_pcie_host_class_init,
> -};
> -
> -static void designware_pcie_register(void)
> -{
> -    type_register_static(&designware_pcie_root_info);
> -    type_register_static(&designware_pcie_host_info);
> -}
> -type_init(designware_pcie_register)
> +DEFINE_TYPES(designware_pcie_types)
> 

Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>

This patch can get merged independently of this series.


Cheers,
Gustavo