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[174.21.71.127]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72f8a78f317sm7508936b3a.176.2025.01.27.08.09.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Jan 2025 08:09:31 -0800 (PST) Message-ID: <2f7fc713-2e56-4d68-80c4-99db8f6aa9e7@linaro.org> Date: Mon, 27 Jan 2025 08:09:30 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 24/76] fpu: allow flushing of output denormals to be after rounding To: Peter Maydell Cc: qemu-devel@nongnu.org References: <20250124162836.2332150-1-peter.maydell@linaro.org> <20250124162836.2332150-25-peter.maydell@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/27/25 02:01, Peter Maydell wrote: > On Sat, 25 Jan 2025 at 16:42, Richard Henderson > wrote: >> >> On 1/24/25 08:27, Peter Maydell wrote: >>> Currently we handle flushing of output denormals in uncanon_normal >>> always before we deal with rounding. This works for architectures >>> that detect tininess before rounding, but is usually not the right >>> place when the architecture detects tininess after rounding. For >>> example, for x86 the SDM states that the MXCSR FTZ control bit causes >>> outputs to be flushed to zero "when it detects a floating-point >>> underflow condition". This means that we mustn't flush to zero if >>> the input is such that after rounding it is no longer tiny. >>> >>> At least one of our guest architectures does underflow detection >>> after rounding but flushing of denormals before rounding (MIPS MSA); >> >> Whacky, but yes, I see that in the msa docs. >> >>> Add an ftz_detection flag. For consistency with >>> tininess_before_rounding, we make it default to "detect ftz after >>> rounding"; this means that we need to explicitly set the flag to >>> "detect ftz before rounding" on every existing architecture that sets >>> flush_to_zero, so that this commit has no behaviour change. >>> (This means more code change here but for the long term a less >>> confusing API.) >> >> Do we really want flush_to_zero to be separate from ftz_detection? >> >> E.g. >> >> enum { >> float_ftz_disabled, >> float_ftz_after_rounding, >> float_ftz_before_rounding, >> } > > I did consider that, but on almost all targets the "before > or after rounding" setting is constant for the life of the > emulation, whereas turning ftz on and off via a status register > bit is common. I preferred to leave it so that you could continue > to write: > set_flush_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status) > or whatever, rather than having to switch to > (vscr >> VSCR_NJ) ? float_ftz_before_rounding : float_ftz_disabled. > which in addition to being more longwinded also means that the > "is this architecture ftz before or after rounding" setting is > scattered in multiple places, wherever it turns FTZ on or off. Fair. > And for Arm it gets more awkward, because the FZ bit is > "turn FTZ on or off, whatever its current semantics are", so > you end up needing "FZ ? AH ? after_rounding : before_rounding : disabled". Ah, yes. r~