From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Song Gao <gaosong@loongson.cn>, qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org, peter.maydell@linaro.org,
maobibo@loongson.cn
Subject: Re: [PATCH v3 03/17] hw/loongarch: Add slave cpu boot_code
Date: Wed, 27 Dec 2023 09:52:29 +0100 [thread overview]
Message-ID: <30753721-2f4f-4666-9717-48fcf4f136d9@linaro.org> (raw)
In-Reply-To: <20231227080821.3216113-4-gaosong@loongson.cn>
Hi,
On 27/12/23 09:08, Song Gao wrote:
> Signed-off-by: Song Gao <gaosong@loongson.cn>
> ---
> hw/loongarch/boot.c | 71 ++++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 70 insertions(+), 1 deletion(-)
>
> diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
> index 3075c276d4..faff880153 100644
> --- a/hw/loongarch/boot.c
> +++ b/hw/loongarch/boot.c
> @@ -14,6 +14,54 @@
> #include "qemu/error-report.h"
> #include "sysemu/reset.h"
>
> +static unsigned int slave_boot_code[] = {
'const'
> + /* Configure reset ebase. */
> + 0x0400302c, /* csrwr $r12,0xc */
> +
> + /* Disable interrupt. */
> + 0x0380100c, /* ori $r12,$r0,0x4 */
> + 0x04000180, /* csrxchg $r0,$r12,0x0 */
> +
> + /* Clear mailbox. */
> + 0x1400002d, /* lu12i.w $r13,1(0x1) */
> + 0x038081ad, /* ori $r13,$r13,0x20 */
> + 0x06481da0, /* iocsrwr.d $r0,$r13 */
> +
> + /* Enable IPI interrupt. */
> + 0x1400002c, /* lu12i.w $r12,1(0x1) */
> + 0x0400118c, /* csrxchg $r12,$r12,0x4 */
> + 0x02fffc0c, /* addi.d $r12,$r0,-1(0xfff) */
> + 0x1400002d, /* lu12i.w $r13,1(0x1) */
> + 0x038011ad, /* ori $r13,$r13,0x4 */
> + 0x064819ac, /* iocsrwr.w $r12,$r13 */
> + 0x1400002d, /* lu12i.w $r13,1(0x1) */
> + 0x038081ad, /* ori $r13,$r13,0x20 */
> +
> + /* Wait for wakeup <.L11>: */
> + 0x06488000, /* idle 0x0 */
> + 0x03400000, /* andi $r0,$r0,0x0 */
> + 0x064809ac, /* iocsrrd.w $r12,$r13 */
> + 0x43fff59f, /* beqz $r12,-12(0x7ffff4) # 48 <.L11> */
> +
> + /* Read and clear IPI interrupt. */
> + 0x1400002d, /* lu12i.w $r13,1(0x1) */
> + 0x064809ac, /* iocsrrd.w $r12,$r13 */
> + 0x1400002d, /* lu12i.w $r13,1(0x1) */
> + 0x038031ad, /* ori $r13,$r13,0xc */
> + 0x064819ac, /* iocsrwr.w $r12,$r13 */
> +
> + /* Disable IPI interrupt. */
> + 0x1400002c, /* lu12i.w $r12,1(0x1) */
> + 0x04001180, /* csrxchg $r0,$r12,0x4 */
> +
> + /* Read mail buf and jump to specified entry */
> + 0x1400002d, /* lu12i.w $r13,1(0x1) */
> + 0x038081ad, /* ori $r13,$r13,0x20 */
> + 0x06480dac, /* iocsrrd.d $r12,$r13 */
> + 0x00150181, /* move $r1,$r12 */
> + 0x4c000020, /* jirl $r0,$r1,0 */
> +};
> +
> static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
> {
> return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
> @@ -110,11 +158,19 @@ static void loongarch_firmware_boot(LoongArchMachineState *lams,
> fw_cfg_add_kernel_info(info, lams->fw_cfg);
> }
>
> +static void init_boot_rom(struct loongarch_boot_info *info, void *p)
> +{
> + memcpy(p, &slave_boot_code, sizeof(slave_boot_code));
> + p += sizeof(slave_boot_code);
> +}
> +
> static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
> {
> + static void *p;
Why 'static'?
> int64_t kernel_addr = 0;
> LoongArchCPU *lacpu;
> CPUState *cs;
> + void *bp;
>
> if (info->kernel_filename) {
> kernel_addr = load_kernel_info(info);
> @@ -123,11 +179,24 @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
> exit(1);
> }
>
> + /* Load 'boot_rom' at [0 - 1MiB] */
> + p = g_malloc0(1 * MiB);
> + bp = p;
> + init_boot_rom(info, p);
> + rom_add_blob_fixed("boot_rom", bp, 1 * MiB, 0);
> +
> CPU_FOREACH(cs) {
> lacpu = LOONGARCH_CPU(cs);
> lacpu->env.load_elf = true;
> - lacpu->env.elf_address = kernel_addr;
> + if (cs == first_cpu) {
> + lacpu->env.elf_address = kernel_addr;
> + } else {
> + lacpu->env.elf_address = 0;
> + }
> + lacpu->env.boot_info = info;
> }
> +
> + g_free(bp);
(besides, IIUC 'p' now points to released memory).
> }
>
> void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
next prev parent reply other threads:[~2023-12-27 8:52 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-27 8:08 [PATCH v3 00/17] Add boot LoongArch elf kernel with FDT Song Gao
2023-12-27 8:08 ` [PATCH v3 01/17] hw/loongarch: Move boot fucntions to boot.c Song Gao
2023-12-27 8:08 ` [PATCH v3 02/17] hw/loongarch: Add load initrd Song Gao
2023-12-27 8:08 ` [PATCH v3 03/17] hw/loongarch: Add slave cpu boot_code Song Gao
2023-12-27 8:52 ` Philippe Mathieu-Daudé [this message]
2023-12-28 1:06 ` gaosong
2023-12-27 8:08 ` [PATCH v3 04/17] hw/loongarch: Add init_cmdline Song Gao
2023-12-27 8:49 ` Philippe Mathieu-Daudé
2023-12-28 1:06 ` gaosong
2023-12-27 8:08 ` [PATCH v3 05/17] hw/loongarch: Init efi_system_table Song Gao
2023-12-27 8:08 ` [PATCH v3 06/17] hw/loongarch: Init efi_boot_memmap table Song Gao
2023-12-27 8:08 ` [PATCH v3 07/17] hw/loongarch: Init efi_initrd table Song Gao
2023-12-27 8:08 ` [PATCH v3 08/17] hw/loongarch: Init efi_fdt table Song Gao
2023-12-27 8:08 ` [PATCH v3 09/17] hw/loongarch: Fix fdt memory node wrong 'reg' Song Gao
2023-12-27 8:08 ` [PATCH v3 10/17] hw/loongarch: fdt adds cpu interrupt controller node Song Gao
2023-12-27 8:08 ` [PATCH v3 11/17] hw/loongarch: fdt adds Extend I/O Interrupt Controller Song Gao
2023-12-27 9:02 ` Philippe Mathieu-Daudé
2023-12-28 1:06 ` gaosong
2023-12-27 8:08 ` [PATCH v3 12/17] hw/loongarch: fdt adds pch_pic Controller Song Gao
2023-12-27 8:08 ` [PATCH v3 13/17] hw/loongarch: fdt adds pch_msi Controller Song Gao
2023-12-27 8:08 ` [PATCH v3 14/17] hw/loongarch: fdt adds pcie irq_map node Song Gao
2023-12-27 8:08 ` [PATCH v3 15/17] hw/loongarch: fdt remove unused irqchip node Song Gao
2023-12-27 8:08 ` [PATCH v3 16/17] hw/loongarch: Add cells missing from uart node Song Gao
2023-12-27 8:08 ` [PATCH v3 17/17] hw/loongarch: Add cells missing from rtc node Song Gao
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