From: "Cédric Le Goater" <clg@kaod.org>
To: Jamin Lin <jamin_lin@aspeedtech.com>,
Peter Maydell <peter.maydell@linaro.org>,
Steven Lee <steven_lee@aspeedtech.com>,
Troy Lee <leetroy@gmail.com>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Joel Stanley <joel@jms.id.au>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>
Cc: troy_lee@aspeedtech.com
Subject: Re: [PATCH v5 03/29] hw/intc/aspeed: Introduce dynamic allocation for regs array
Date: Thu, 6 Mar 2025 16:22:57 +0100 [thread overview]
Message-ID: <30a760c0-db9e-4d5b-a41c-f11ad1451f3c@kaod.org> (raw)
In-Reply-To: <20250306103846.429221-4-jamin_lin@aspeedtech.com>
On 3/6/25 11:38, Jamin Lin wrote:
> Currently, the size of the "regs" array is 0x2000, which is too large. To save
> code size and avoid mapping large unused gaps, will update it to only map the
> useful set of registers. This update will support multiple sub-regions with
> different sizes.
>
> To address the redundant size issue, replace the static "regs" array with a
> dynamically allocated "regs" memory.
>
> Introduce a new "aspeed_intc_unrealize" function to free the allocated "regs"
> memory.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> include/hw/intc/aspeed_intc.h | 2 +-
> hw/intc/aspeed_intc.c | 12 +++++++++++-
> 2 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/include/hw/intc/aspeed_intc.h b/include/hw/intc/aspeed_intc.h
> index 03324f05ab..47ea0520b5 100644
> --- a/include/hw/intc/aspeed_intc.h
> +++ b/include/hw/intc/aspeed_intc.h
> @@ -27,7 +27,7 @@ struct AspeedINTCState {
> MemoryRegion iomem;
> MemoryRegion iomem_container;
>
> - uint32_t regs[ASPEED_INTC_NR_REGS];
> + uint32_t *regs;
> OrIRQState orgates[ASPEED_INTC_NR_INTS];
> qemu_irq output_pins[ASPEED_INTC_NR_INTS];
>
> diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
> index 465f41e4fd..feb2c52441 100644
> --- a/hw/intc/aspeed_intc.c
> +++ b/hw/intc/aspeed_intc.c
> @@ -289,7 +289,7 @@ static void aspeed_intc_reset(DeviceState *dev)
> {
> AspeedINTCState *s = ASPEED_INTC(dev);
>
> - memset(s->regs, 0, sizeof(s->regs));
> + memset(s->regs, 0, ASPEED_INTC_NR_REGS);
this is not the same size. s->regs is larger than ASPEED_INTC_NR_REGS.
> memset(s->enable, 0, sizeof(s->enable));
> memset(s->mask, 0, sizeof(s->mask));
> memset(s->pending, 0, sizeof(s->pending));
> @@ -307,6 +307,7 @@ static void aspeed_intc_realize(DeviceState *dev, Error **errp)
>
> sysbus_init_mmio(sbd, &s->iomem_container);
>
> + s->regs = g_malloc0(ASPEED_INTC_NR_REGS);
please use g_new(....)
Thanks,
C.
> memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_intc_ops, s,
> TYPE_ASPEED_INTC ".regs", ASPEED_INTC_NR_REGS << 2);
>
> @@ -322,12 +323,21 @@ static void aspeed_intc_realize(DeviceState *dev, Error **errp)
> }
> }
>
> +static void aspeed_intc_unrealize(DeviceState *dev)
> +{
> + AspeedINTCState *s = ASPEED_INTC(dev);
> +
> + g_free(s->regs);
> + s->regs = NULL;
> +}
> +
> static void aspeed_intc_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> dc->desc = "ASPEED INTC Controller";
> dc->realize = aspeed_intc_realize;
> + dc->unrealize = aspeed_intc_unrealize;
> device_class_set_legacy_reset(dc, aspeed_intc_reset);
> dc->vmsd = NULL;
> }
next prev parent reply other threads:[~2025-03-06 15:24 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-06 10:38 [PATCH v5 00/29] Support AST2700 A1 Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 01/29] hw/intc/aspeed: Support setting different memory size Jamin Lin via
2025-03-06 15:04 ` Cédric Le Goater
2025-03-06 10:38 ` [PATCH v5 02/29] hw/intc/aspeed: Rename status_addr and addr to status_reg and reg for clarity Jamin Lin via
2025-03-06 15:04 ` Cédric Le Goater
2025-03-06 10:38 ` [PATCH v5 03/29] hw/intc/aspeed: Introduce dynamic allocation for regs array Jamin Lin via
2025-03-06 15:22 ` Cédric Le Goater [this message]
2025-03-07 2:23 ` Jamin Lin
2025-03-06 10:38 ` [PATCH v5 04/29] hw/intc/aspeed: Support setting different register size Jamin Lin via
2025-03-06 15:24 ` Cédric Le Goater
2025-03-07 2:43 ` Jamin Lin
2025-03-06 10:38 ` [PATCH v5 05/29] hw/intc/aspeed: Reduce regs array size by adding a register sub-region Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 06/29] hw/intc/aspeed: Introduce helper functions for enable and status registers Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 07/29] hw/intc/aspeed: Add object type name to trace events for better debugging Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 08/29] hw/arm/aspeed: Rename IRQ table and machine name for AST2700 A0 Jamin Lin via
2025-03-06 15:08 ` Cédric Le Goater
2025-03-06 10:38 ` [PATCH v5 09/29] hw/arm/aspeed_ast27x0: Sort the IRQ table by IRQ number Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 10/29] hw/intc/aspeed: Support different memory region ops Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 11/29] hw/intc/aspeed: Rename num_ints to num_inpins for clarity Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 12/29] hw/intc/aspeed: Add support for multiple output pins in INTC Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 13/29] hw/intc/aspeed: Refactor INTC to support separate input and output pin indices Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 14/29] hw/intc/aspeed: Introduce AspeedINTCIRQ structure to save the irq index and register address Jamin Lin via
2025-03-06 15:10 ` Cédric Le Goater
2025-03-06 10:38 ` [PATCH v5 15/29] hw/intc/aspeed: Introduce IRQ handler function to reduce code duplication Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 16/29] hw/intc/aspeed: Add Support for Multi-Output IRQ Handling Jamin Lin via
2025-03-06 15:10 ` Cédric Le Goater
2025-03-06 10:38 ` [PATCH v5 17/29] hw/intc/aspeed: Add Support for AST2700 INTCIO Controller Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 18/29] hw/misc/aspeed_scu: Add Support for AST2700/AST2750 A1 Silicon Revisions Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 19/29] hw/arm/aspeed_ast27x0.c Support AST2700 A1 GIC Interrupt Mapping Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 20/29] hw/arm/aspeed_ast27x0: Define an Array of AspeedINTCState with Two Instances Jamin Lin via
2025-03-06 15:11 ` Cédric Le Goater
2025-03-06 10:38 ` [PATCH v5 21/29] hw/arm/aspeed_ast27x0: Support two levels of INTC controllers for AST2700 A1 Jamin Lin via
2025-03-06 15:12 ` Cédric Le Goater
2025-03-06 10:38 ` [PATCH v5 22/29] hw/arm/aspeed_ast27x0: Add SoC Support " Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 23/29] hw/arm/aspeed: Add Machine " Jamin Lin via
2025-03-06 15:12 ` Cédric Le Goater
2025-03-06 10:38 ` [PATCH v5 24/29] hw/arm/aspeed_ast27x0: Sort the memmap table by mapping address Jamin Lin via
2025-03-06 15:12 ` Cédric Le Goater
2025-03-06 10:38 ` [PATCH v5 25/29] tests/functional/aspeed: Introduce start_ast2700_test API Jamin Lin via
2025-03-06 15:13 ` Cédric Le Goater
2025-03-06 10:38 ` [PATCH v5 26/29] tests/functional/aspeed: Update temperature hwmon path Jamin Lin via
2025-03-06 15:13 ` Cédric Le Goater
2025-03-06 10:38 ` [PATCH v5 27/29] tests/functional/aspeed: Update test ASPEED SDK v09.05 Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 28/29] tests/functional/aspeed: Add test case for AST2700 A1 Jamin Lin via
2025-03-06 10:38 ` [PATCH v5 29/29] docs/specs: Add aspeed-intc Jamin Lin via
2025-03-06 15:27 ` [PATCH v5 00/29] Support AST2700 A1 Cédric Le Goater
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