qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: BALATON Zoltan <balaton@eik.bme.hu>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: Daniel Henrique Barboza <danielhb413@gmail.com>
Subject: Re: [PATCH 13/13] ppc440_pcix: Stop using system io region for PCI bus
Date: Tue, 4 Jul 2023 11:01:17 +0200	[thread overview]
Message-ID: <30d1e44d-8ce5-030b-a052-0574ac76a0c7@linaro.org> (raw)
In-Reply-To: <19ca518931d704615e801df249f2071c9f74a7dc.1688421085.git.balaton@eik.bme.hu>

On 4/7/23 00:02, BALATON Zoltan wrote:
> Use the iomem region for the PCI io space and map it directly from the
> board without an intermediate alias that is not really needed.

"Reduce the I/O region to 64K."

> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
>   hw/ppc/ppc440_pcix.c | 8 +++++---
>   hw/ppc/sam460ex.c    | 6 +-----
>   2 files changed, 6 insertions(+), 8 deletions(-)
> 
> diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c
> index ee2dc44f67..cca8a72c72 100644
> --- a/hw/ppc/ppc440_pcix.c
> +++ b/hw/ppc/ppc440_pcix.c
> @@ -490,10 +490,11 @@ static void ppc440_pcix_realize(DeviceState *dev, Error **errp)
>       s = PPC440_PCIX_HOST(dev);
>   
>       sysbus_init_irq(sbd, &s->irq);
> -    memory_region_init(&s->busmem, OBJECT(dev), "pci bus memory", UINT64_MAX);
> +    memory_region_init(&s->busmem, OBJECT(dev), "pci-mem", UINT64_MAX);
> +    memory_region_init(&s->iomem, OBJECT(dev), "pci-io", 0x10000);

64 * KiB

>       h->bus = pci_register_root_bus(dev, NULL, ppc440_pcix_set_irq,
> -                         ppc440_pcix_map_irq, &s->irq, &s->busmem,
> -                         get_system_io(), PCI_DEVFN(0, 0), 1, TYPE_PCI_BUS);
> +                         ppc440_pcix_map_irq, &s->irq, &s->busmem, &s->iomem,
> +                         PCI_DEVFN(0, 0), 1, TYPE_PCI_BUS);
>   
>       s->dev = pci_create_simple(h->bus, PCI_DEVFN(0, 0),
>                                  TYPE_PPC4xx_HOST_BRIDGE);
> @@ -514,6 +515,7 @@ static void ppc440_pcix_realize(DeviceState *dev, Error **errp)
>       memory_region_add_subregion(&s->container, PCIC0_CFGDATA, &h->data_mem);
>       memory_region_add_subregion(&s->container, PPC440_REG_BASE, regs);
>       sysbus_init_mmio(sbd, &s->container);
> +    sysbus_init_mmio(sbd, &s->iomem);
>   }

With the changes requested:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>




      reply	other threads:[~2023-07-04  9:01 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-03 22:02 [PATCH 00/13] PPC440 devices misc clean up BALATON Zoltan
2023-07-03 22:02 ` [PATCH 01/13] ppc440: Change ppc460ex_pcie_init() parameter type BALATON Zoltan
2023-07-04  8:48   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 02/13] ppc440: Add cpu link property to PCIe controller model BALATON Zoltan
2023-07-04  8:46   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 03/13] ppc440: Add a macro to shorten PCIe controller DCR registration BALATON Zoltan
2023-07-04  8:49   ` Philippe Mathieu-Daudé
2023-07-04  9:33     ` BALATON Zoltan
2023-07-04  9:55       ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 04/13] ppc440: Rename local variable in dcr_read_pcie() BALATON Zoltan
2023-07-04  8:50   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 05/13] ppc440: Stop using system io region for PCIe buses BALATON Zoltan
2023-07-04  8:51   ` Philippe Mathieu-Daudé
2023-07-04  9:48     ` BALATON Zoltan
2023-07-03 22:02 ` [PATCH 06/13] sam460ex: Remove address_space_mem local variable BALATON Zoltan
2023-07-03 22:02 ` [PATCH 07/13] ppc440: Add busnum property to PCIe controller model BALATON Zoltan
2023-07-04  8:52   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 08/13] ppc440: Remove ppc460ex_pcie_init legacy init function BALATON Zoltan
2023-07-04  8:53   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 09/13] ppc4xx_pci: Rename QOM type name define BALATON Zoltan
2023-07-04  8:56   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 10/13] ppc4xx_pci: Add define for ppc4xx-host-bridge type name BALATON Zoltan
2023-07-04  8:57   ` Philippe Mathieu-Daudé
2023-07-04  9:36     ` BALATON Zoltan
2023-07-03 22:02 ` [PATCH 11/13] ppc440_pcix: Rename QOM type define abd move it to common header BALATON Zoltan
2023-07-04  8:58   ` Philippe Mathieu-Daudé
2023-07-03 22:02 ` [PATCH 12/13] ppc440_pcix: Don't use iomem for regs BALATON Zoltan
2023-07-04  8:59   ` Philippe Mathieu-Daudé
2023-07-04  9:37     ` BALATON Zoltan
2023-07-04  9:57       ` Philippe Mathieu-Daudé
2023-07-04 10:14         ` BALATON Zoltan
2023-07-03 22:02 ` [PATCH 13/13] ppc440_pcix: Stop using system io region for PCI bus BALATON Zoltan
2023-07-04  9:01   ` Philippe Mathieu-Daudé [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=30d1e44d-8ce5-030b-a052-0574ac76a0c7@linaro.org \
    --to=philmd@linaro.org \
    --cc=balaton@eik.bme.hu \
    --cc=danielhb413@gmail.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).