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From: Yi Liu <yi.l.liu@intel.com>
To: CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "jasowang@redhat.com" <jasowang@redhat.com>,
	"zhenzhong.duan@intel.com" <zhenzhong.duan@intel.com>,
	"kevin.tian@intel.com" <kevin.tian@intel.com>,
	"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
	"peterx@redhat.com" <peterx@redhat.com>
Subject: Re: [PATCH v1 0/8] PRI support for VT-d
Date: Fri, 5 Jul 2024 11:03:36 +0800	[thread overview]
Message-ID: <311d4200-a5a4-418b-bc54-9f2c871235b0@intel.com> (raw)
In-Reply-To: <20240530122439.42888-1-clement.mathieu--drif@eviden.com>

On 2024/5/30 20:24, CLEMENT MATHIEU--DRIF wrote:
> This series belongs to a list of series that add SVM support for VT-d.
> 
> Here we focus on the implementation of PRI support in the IOMMU and on a PCI-level
> API for PRI to be used by virtual devices.
> 
> This work is based on the VT-d specification version 4.1 (March 2023).
> Here is a link to a GitHub repository where you can find the following elements :
>      - Qemu with all the patches for SVM
>          - ATS
>          - PRI
>          - Device IOTLB invalidations
>          - Requests with already translated addresses
>      - A demo device
>      - A simple driver for the demo device
>      - A userspace program (for testing and demonstration purposes)

I didn't see the drain PRQ related logics in this series. Please consider
adding it in next version. It's needed when repurposing a PASID.

> https://github.com/BullSequana/Qemu-in-guest-SVM-demo
> 
> Clément Mathieu--Drif (8):
>    pcie: add a helper to declare the PRI capability for a pcie device
>    pcie: helper functions to check to check if PRI is enabled
>    pcie: add a way to get the outstanding page request allocation (pri)
>      from the config space.
>    pci: declare structures and IOMMU operation for PRI
>    pci: add a PCI-level API for PRI
>    intel_iommu: declare PRI constants and structures
>    intel_iommu: declare registers for PRI
>    intel_iommu: add PRI operations support
> 
>   hw/i386/intel_iommu.c          | 302 +++++++++++++++++++++++++++++++++
>   hw/i386/intel_iommu_internal.h |  54 +++++-
>   hw/pci/pci.c                   |  37 ++++
>   hw/pci/pcie.c                  |  42 +++++
>   include/exec/memory.h          |  65 +++++++
>   include/hw/pci/pci.h           |  45 +++++
>   include/hw/pci/pci_bus.h       |   1 +
>   include/hw/pci/pcie.h          |   7 +-
>   include/hw/pci/pcie_regs.h     |   4 +
>   system/memory.c                |  49 ++++++
>   10 files changed, 604 insertions(+), 2 deletions(-)
> 

-- 
Regards,
Yi Liu


  parent reply	other threads:[~2024-07-05  3:00 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-30 12:24 [PATCH v1 0/8] PRI support for VT-d CLEMENT MATHIEU--DRIF
2024-05-30 12:25 ` [PATCH v1 1/8] pcie: add a helper to declare the PRI capability for a pcie device CLEMENT MATHIEU--DRIF
2024-05-30 12:25 ` [PATCH v1 2/8] pcie: helper functions to check to check if PRI is enabled CLEMENT MATHIEU--DRIF
2024-05-30 12:25 ` [PATCH v1 3/8] pcie: add a way to get the outstanding page request allocation (pri) from the config space CLEMENT MATHIEU--DRIF
2024-05-30 12:25 ` [PATCH v1 4/8] pci: declare structures and IOMMU operation for PRI CLEMENT MATHIEU--DRIF
2024-05-30 12:25 ` [PATCH v1 6/8] intel_iommu: declare PRI constants and structures CLEMENT MATHIEU--DRIF
2024-05-30 12:25 ` [PATCH v1 5/8] pci: add a PCI-level API for PRI CLEMENT MATHIEU--DRIF
2024-05-30 12:25 ` [PATCH v1 7/8] intel_iommu: declare registers " CLEMENT MATHIEU--DRIF
2024-05-30 12:25 ` [PATCH v1 8/8] intel_iommu: add PRI operations support CLEMENT MATHIEU--DRIF
2024-06-06 16:12 ` [PATCH v1 0/8] PRI support for VT-d CLEMENT MATHIEU--DRIF
2024-07-04  6:24 ` Michael S. Tsirkin
2024-07-04 14:53   ` CLEMENT MATHIEU--DRIF
2024-07-05  3:03 ` Yi Liu [this message]
2024-07-05  5:13   ` CLEMENT MATHIEU--DRIF
2024-07-05  6:20     ` Yi Liu
2024-07-05 10:03       ` cmd

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