From: "Cédric Le Goater" <clg@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH for-2.10 1/8] ppc/xics: add a xics_get_cpu_index_by_pir() helper
Date: Tue, 14 Mar 2017 18:00:43 +0100 [thread overview]
Message-ID: <3136fbfa-938a-679e-0bf6-c1dab315d425@kaod.org> (raw)
In-Reply-To: <20170314053856.GH12564@umbus.fritz.box>
On 03/14/2017 06:38 AM, David Gibson wrote:
> On Wed, Mar 08, 2017 at 11:52:44AM +0100, Cédric Le Goater wrote:
>> This helper will be used to translate the server number of the XIVE
>> (which is a PIR) into an ICPState index number (which is a cpu index).
>>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>
> This seems a slightly roundabout way of doing things. Why not just
> have the vcpu_by_pir() interface, then have the XICSFabric implementor
> go directly from PIR to xics server state.
So what you are saying is that we should try to move the "nature"
of the 'server' parameter of the xics framework in the icp_get()
handler of the XICSFabric. Correct ? Because at the end, it all
boils down to use a 'server' to look for an ICPState.
Each machine would do its conversion :
xics_get_cpu_index_by_dt_id() for spapr
xics_get_cpu_index_by_pir() for powernv
C.
next prev parent reply other threads:[~2017-03-14 17:01 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-08 10:52 [Qemu-devel] [PATCH for-2.10 0/8] ppc/pnv: interrupt controller (POWER8) Cédric Le Goater
2017-03-08 10:52 ` [Qemu-devel] [PATCH for-2.10 1/8] ppc/xics: add a xics_get_cpu_index_by_pir() helper Cédric Le Goater
2017-03-14 5:38 ` David Gibson
2017-03-14 8:11 ` Cédric Le Goater
2017-03-14 17:00 ` Cédric Le Goater [this message]
2017-03-15 4:53 ` David Gibson
2017-03-15 10:04 ` Cédric Le Goater
2017-03-08 10:52 ` [Qemu-devel] [PATCH for-2.10 2/8] ppc/xics: add an ics_eoi() handler to XICSFabric Cédric Le Goater
2017-03-14 5:40 ` David Gibson
2017-03-14 8:12 ` Cédric Le Goater
2017-03-08 10:52 ` [Qemu-devel] [PATCH for-2.10 3/8] ppc/pnv: create the ICP and ICS objects under the machine Cédric Le Goater
2017-03-14 5:45 ` David Gibson
2017-03-14 9:47 ` Cédric Le Goater
2017-03-08 10:52 ` [Qemu-devel] [PATCH for-2.10 4/8] ppc/pnv: add memory regions for the ICP registers Cédric Le Goater
2017-03-08 11:24 ` Philippe Mathieu-Daudé
2017-03-08 13:33 ` Cédric Le Goater
2017-03-14 5:49 ` David Gibson
2017-03-08 10:52 ` [Qemu-devel] [PATCH for-2.10 5/8] ppc/pnv: map the ICP memory regions Cédric Le Goater
2017-03-14 5:52 ` David Gibson
2017-03-14 10:02 ` Cédric Le Goater
2017-03-08 10:52 ` [Qemu-devel] [PATCH for-2.10 6/8] ppc/pnv: Add cut down PSI bridge model and hookup external interrupt Cédric Le Goater
2017-03-15 6:16 ` David Gibson
2017-03-15 9:38 ` Benjamin Herrenschmidt
2017-03-16 13:52 ` Cédric Le Goater
2017-03-17 2:00 ` David Gibson
2017-03-17 8:27 ` Cédric Le Goater
2017-03-21 13:36 ` Cédric Le Goater
2017-03-08 10:52 ` [Qemu-devel] [PATCH for-2.10 7/8] ppc/pnv: Add OCC model stub with interrupt support Cédric Le Goater
2017-03-08 10:52 ` [Qemu-devel] [PATCH for-2.10 8/8] ppc/pnv: Add support for POWER8+ LPC Controller Cédric Le Goater
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