From: Richard Henderson <richard.henderson@linaro.org>
To: Max Filippov <jcmvbkbc@gmail.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Thomas Huth <thuth@redhat.com>,
Ilya Leoshkevich <iii@linux.ibm.com>,
David Hildenbrand <david@redhat.com>,
Cornelia Huck <cohuck@redhat.com>,
qemu-devel <qemu-devel@nongnu.org>,
Christian Borntraeger <borntraeger@de.ibm.com>,
qemu-s390x@nongnu.org, qemu-arm <qemu-arm@nongnu.org>,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation
Date: Thu, 15 Apr 2021 07:33:47 -0700 [thread overview]
Message-ID: <315a4dfe-fdb2-2d01-7e7a-2d413ee0d77a@linaro.org> (raw)
In-Reply-To: <CAMo8BfJNcfAp_tJWHQziUQXxR8WykLcBGTKnHeWS=TtLYwTC=g@mail.gmail.com>
On 4/14/21 6:23 PM, Max Filippov wrote:
> I see a few places where target/xtensa may do that. E.g. it does that on entry
> to an exception handler to allow for debugging its first instruction.
> No guest code
> is consumed to make this decision, would size 1 work in that case?
> I'll take a look.
Yes, any positive value will do.
r~
next prev parent reply other threads:[~2021-04-15 14:35 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-14 13:41 [PATCH v3 0/3] accel/tcg: Make sure that tb->size != 0 after translation Ilya Leoshkevich
2021-04-14 13:41 ` [PATCH v3 1/3] target/s390x: Fix translation exception on illegal instruction Ilya Leoshkevich
2021-04-14 14:47 ` David Hildenbrand
2021-04-14 13:41 ` [PATCH v3 2/3] target/arm: Make sure that commpage's tb->size != 0 Ilya Leoshkevich
2021-04-14 13:41 ` [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation Ilya Leoshkevich
2021-04-14 14:48 ` David Hildenbrand
2021-04-14 16:45 ` Ilya Leoshkevich
2021-04-14 18:03 ` Max Filippov
2021-04-14 19:43 ` Richard Henderson
2021-04-15 1:23 ` Max Filippov
2021-04-15 11:14 ` Ilya Leoshkevich
2021-04-15 14:33 ` Richard Henderson [this message]
2021-04-15 15:02 ` Peter Maydell
2021-04-15 20:20 ` Max Filippov
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