Re: [PATCH 4/4] target/ppc: move xscvqpdp to decodetree

[Richard Henderson <richard.henderson@linaro.org>]

On 12/10/21 8:19 AM, Matheus K. Ferst wrote:
> On 10/12/2021 11:13, Victor Colombo wrote:
>> From: Matheus Ferst <matheus.ferst@eldorado.org.br>
>>
>> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
>> ---
>>   target/ppc/fpu_helper.c             | 10 +++-------
>>   target/ppc/helper.h                 |  2 +-
>>   target/ppc/insn32.decode            |  4 ++++
>>   target/ppc/translate/vsx-impl.c.inc | 24 +++++++++++++-----------
>>   target/ppc/translate/vsx-ops.c.inc  |  1 -
>>   5 files changed, 21 insertions(+), 20 deletions(-)
> 
> <snip>
> 
>> diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc
>> index ab5cb21f13..f8669cae42 100644
>> --- a/target/ppc/translate/vsx-impl.c.inc
>> +++ b/target/ppc/translate/vsx-impl.c.inc
>> @@ -904,22 +904,24 @@ VSX_CMP(xvcmpgesp, 0x0C, 0x0A, 0, PPC2_VSX)
>>   VSX_CMP(xvcmpgtsp, 0x0C, 0x09, 0, PPC2_VSX)
>>   VSX_CMP(xvcmpnesp, 0x0C, 0x0B, 0, PPC2_VSX)
>> -static void gen_xscvqpdp(DisasContext *ctx)
>> +static bool trans_XSCVQPDP(DisasContext *ctx, arg_X_tb_rc *a)
>>   {
>> -    TCGv_i32 opc;
>> +    TCGv_i32 ro;
>>       TCGv_ptr xt, xb;
>> -    if (unlikely(!ctx->vsx_enabled)) {
>> -        gen_exception(ctx, POWERPC_EXCP_VSXU);
>> -        return;
>> -    }
>> -    opc = tcg_const_i32(ctx->opcode);
>> -    xt = gen_vsr_ptr(rD(ctx->opcode) + 32);
>> -    xb = gen_vsr_ptr(rB(ctx->opcode) + 32);
>> -    gen_helper_xscvqpdp(cpu_env, opc, xt, xb);
>> -    tcg_temp_free_i32(opc);
>> +    REQUIRE_INSNS_FLAGS2(ctx, ISA310);
> 
> It's actually ISA300. We'll send a v2 fixing this.

Yep.  With that,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~