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[176.184.28.119]) by smtp.gmail.com with ESMTPSA id s3-20020a5d6a83000000b002fe13ec49fasm4846938wru.98.2023.04.21.11.06.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 21 Apr 2023 11:06:53 -0700 (PDT) Message-ID: <3175956a-ab3c-7259-1b28-6fe54043238f@linaro.org> Date: Fri, 21 Apr 2023 20:06:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v10 06/11] target/arm: move cpu_tcg to tcg/cpu32.c Content-Language: en-US To: Fabiano Rosas , qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell , Richard Henderson , =?UTF-8?Q?Alex_Benn=c3=a9e?= , Paolo Bonzini , Claudio Fontana , Eduardo Habkost , Alexander Graf , Cornelia Huck , Thomas Huth , Laurent Vivier References: <20230412121829.14452-1-farosas@suse.de> <20230412121829.14452-7-farosas@suse.de> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20230412121829.14452-7-farosas@suse.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -53 X-Spam_score: -5.4 X-Spam_bar: ----- X-Spam_report: (-5.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-3.297, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/4/23 14:18, Fabiano Rosas wrote: > From: Claudio Fontana > > move the module containing cpu models definitions > for 32bit TCG-only CPUs to tcg/ and rename it for clarity. > > Signed-off-by: Claudio Fontana > Signed-off-by: Fabiano Rosas > Reviewed-by: Richard Henderson > Acked-by: Thomas Huth > --- > hw/arm/virt.c | 2 +- > target/arm/meson.build | 1 - > target/arm/{cpu_tcg.c => tcg/cpu32.c} | 13 +++---------- > target/arm/tcg/cpu64.c | 2 +- > target/arm/tcg/meson.build | 1 + > tests/qtest/arm-cpu-features.c | 12 +++++++++--- > 6 files changed, 15 insertions(+), 16 deletions(-) > rename target/arm/{cpu_tcg.c => tcg/cpu32.c} (99%) > diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c > index 1cb08138ad..1555b0bab8 100644 > --- a/tests/qtest/arm-cpu-features.c > +++ b/tests/qtest/arm-cpu-features.c > @@ -506,9 +506,15 @@ static void test_query_cpu_model_expansion_kvm(const void *data) > QDict *resp; > char *error; > > - assert_error(qts, "cortex-a15", > - "We cannot guarantee the CPU type 'cortex-a15' works " > - "with KVM on this host", NULL); > + if (qtest_has_accel("tcg")) { Can we add a comment to explain this non trivial case? I suppose the reason is "KVM is builtin but not available, so we don't want to test the TCG fallback", is that correct? > + assert_error(qts, "cortex-a15", > + "We cannot guarantee the CPU type 'cortex-a15' works " > + "with KVM on this host", NULL); > + } else { > + assert_error(qts, "cortex-a15", > + "The CPU type 'cortex-a15' is not a " > + "recognized ARM CPU type", NULL); > + } > > assert_has_feature_enabled(qts, "host", "aarch64"); >