* [PATCH v3 01/29] exec/cpu-all: extract tlb flags defines to exec/tlb-flags.h
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 02/29] exec/cpu-all: move cpu_copy to linux-user/qemu.h Pierrick Bouvier
` (29 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/cpu-all.h | 63 --------------------
include/exec/tlb-flags.h | 87 ++++++++++++++++++++++++++++
accel/tcg/cputlb.c | 1 +
accel/tcg/user-exec.c | 1 +
semihosting/uaccess.c | 1 +
target/arm/ptw.c | 1 +
target/arm/tcg/helper-a64.c | 1 +
target/arm/tcg/mte_helper.c | 1 +
target/arm/tcg/sve_helper.c | 1 +
target/i386/tcg/system/excp_helper.c | 1 +
target/riscv/op_helper.c | 1 +
target/riscv/vector_helper.c | 1 +
target/s390x/tcg/mem_helper.c | 1 +
target/sparc/mmu_helper.c | 1 +
14 files changed, 99 insertions(+), 63 deletions(-)
create mode 100644 include/exec/tlb-flags.h
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 013fcc9412a..d2895fb55b1 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -36,69 +36,6 @@ CPUArchState *cpu_copy(CPUArchState *env);
#include "cpu.h"
-#ifdef CONFIG_USER_ONLY
-
-/*
- * Allow some level of source compatibility with softmmu. We do not
- * support any of the more exotic features, so only invalid pages may
- * be signaled by probe_access_flags().
- */
-#define TLB_INVALID_MASK (1 << (TARGET_PAGE_BITS_MIN - 1))
-#define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 2))
-#define TLB_WATCHPOINT 0
-
-#else
-
-/*
- * Flags stored in the low bits of the TLB virtual address.
- * These are defined so that fast path ram access is all zeros.
- * The flags all must be between TARGET_PAGE_BITS and
- * maximum address alignment bit.
- *
- * Use TARGET_PAGE_BITS_MIN so that these bits are constant
- * when TARGET_PAGE_BITS_VARY is in effect.
- *
- * The count, if not the placement of these bits is known
- * to tcg/tcg-op-ldst.c, check_max_alignment().
- */
-/* Zero if TLB entry is valid. */
-#define TLB_INVALID_MASK (1 << (TARGET_PAGE_BITS_MIN - 1))
-/* Set if TLB entry references a clean RAM page. The iotlb entry will
- contain the page physical address. */
-#define TLB_NOTDIRTY (1 << (TARGET_PAGE_BITS_MIN - 2))
-/* Set if TLB entry is an IO callback. */
-#define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 3))
-/* Set if TLB entry writes ignored. */
-#define TLB_DISCARD_WRITE (1 << (TARGET_PAGE_BITS_MIN - 4))
-/* Set if the slow path must be used; more flags in CPUTLBEntryFull. */
-#define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS_MIN - 5))
-
-/*
- * Use this mask to check interception with an alignment mask
- * in a TCG backend.
- */
-#define TLB_FLAGS_MASK \
- (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO \
- | TLB_FORCE_SLOW | TLB_DISCARD_WRITE)
-
-/*
- * Flags stored in CPUTLBEntryFull.slow_flags[x].
- * TLB_FORCE_SLOW must be set in CPUTLBEntry.addr_idx[x].
- */
-/* Set if TLB entry requires byte swap. */
-#define TLB_BSWAP (1 << 0)
-/* Set if TLB entry contains a watchpoint. */
-#define TLB_WATCHPOINT (1 << 1)
-/* Set if TLB entry requires aligned accesses. */
-#define TLB_CHECK_ALIGNED (1 << 2)
-
-#define TLB_SLOW_FLAGS_MASK (TLB_BSWAP | TLB_WATCHPOINT | TLB_CHECK_ALIGNED)
-
-/* The two sets of flags must not overlap. */
-QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & TLB_SLOW_FLAGS_MASK);
-
-#endif /* !CONFIG_USER_ONLY */
-
/* Validate correct placement of CPUArchState. */
QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));
diff --git a/include/exec/tlb-flags.h b/include/exec/tlb-flags.h
new file mode 100644
index 00000000000..c371ae77602
--- /dev/null
+++ b/include/exec/tlb-flags.h
@@ -0,0 +1,87 @@
+/*
+ * TLB flags definition
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef TLB_FLAGS_H
+#define TLB_FLAGS_H
+
+#include "exec/cpu-defs.h"
+
+#ifdef CONFIG_USER_ONLY
+
+/*
+ * Allow some level of source compatibility with softmmu. We do not
+ * support any of the more exotic features, so only invalid pages may
+ * be signaled by probe_access_flags().
+ */
+#define TLB_INVALID_MASK (1 << (TARGET_PAGE_BITS_MIN - 1))
+#define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 2))
+#define TLB_WATCHPOINT 0
+
+#else
+
+/*
+ * Flags stored in the low bits of the TLB virtual address.
+ * These are defined so that fast path ram access is all zeros.
+ * The flags all must be between TARGET_PAGE_BITS and
+ * maximum address alignment bit.
+ *
+ * Use TARGET_PAGE_BITS_MIN so that these bits are constant
+ * when TARGET_PAGE_BITS_VARY is in effect.
+ *
+ * The count, if not the placement of these bits is known
+ * to tcg/tcg-op-ldst.c, check_max_alignment().
+ */
+/* Zero if TLB entry is valid. */
+#define TLB_INVALID_MASK (1 << (TARGET_PAGE_BITS_MIN - 1))
+/* Set if TLB entry references a clean RAM page. The iotlb entry will
+ contain the page physical address. */
+#define TLB_NOTDIRTY (1 << (TARGET_PAGE_BITS_MIN - 2))
+/* Set if TLB entry is an IO callback. */
+#define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 3))
+/* Set if TLB entry writes ignored. */
+#define TLB_DISCARD_WRITE (1 << (TARGET_PAGE_BITS_MIN - 4))
+/* Set if the slow path must be used; more flags in CPUTLBEntryFull. */
+#define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS_MIN - 5))
+
+/*
+ * Use this mask to check interception with an alignment mask
+ * in a TCG backend.
+ */
+#define TLB_FLAGS_MASK \
+ (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO \
+ | TLB_FORCE_SLOW | TLB_DISCARD_WRITE)
+
+/*
+ * Flags stored in CPUTLBEntryFull.slow_flags[x].
+ * TLB_FORCE_SLOW must be set in CPUTLBEntry.addr_idx[x].
+ */
+/* Set if TLB entry requires byte swap. */
+#define TLB_BSWAP (1 << 0)
+/* Set if TLB entry contains a watchpoint. */
+#define TLB_WATCHPOINT (1 << 1)
+/* Set if TLB entry requires aligned accesses. */
+#define TLB_CHECK_ALIGNED (1 << 2)
+
+#define TLB_SLOW_FLAGS_MASK (TLB_BSWAP | TLB_WATCHPOINT | TLB_CHECK_ALIGNED)
+
+/* The two sets of flags must not overlap. */
+QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & TLB_SLOW_FLAGS_MASK);
+
+#endif /* !CONFIG_USER_ONLY */
+
+#endif /* TLB_FLAGS_H */
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 613f919fffb..b2db49e305e 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -34,6 +34,7 @@
#include "qemu/error-report.h"
#include "exec/log.h"
#include "exec/helper-proto-common.h"
+#include "exec/tlb-flags.h"
#include "qemu/atomic.h"
#include "qemu/atomic128.h"
#include "tb-internal.h"
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index ebc7c3ecf54..667c5e03543 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -21,6 +21,7 @@
#include "disas/disas.h"
#include "exec/vaddr.h"
#include "exec/exec-all.h"
+#include "exec/tlb-flags.h"
#include "tcg/tcg.h"
#include "qemu/bitops.h"
#include "qemu/rcu.h"
diff --git a/semihosting/uaccess.c b/semihosting/uaccess.c
index a9578911669..cb64725a37c 100644
--- a/semihosting/uaccess.c
+++ b/semihosting/uaccess.c
@@ -11,6 +11,7 @@
#include "exec/cpu-all.h"
#include "exec/cpu-mmu-index.h"
#include "exec/exec-all.h"
+#include "exec/tlb-flags.h"
#include "semihosting/uaccess.h"
void *uaccess_lock_user(CPUArchState *env, target_ulong addr,
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 43309003486..8d4e9e07a94 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -12,6 +12,7 @@
#include "qemu/main-loop.h"
#include "exec/exec-all.h"
#include "exec/page-protection.h"
+#include "exec/tlb-flags.h"
#include "cpu.h"
#include "internals.h"
#include "cpu-features.h"
diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c
index 9244848efed..fa79d19425f 100644
--- a/target/arm/tcg/helper-a64.c
+++ b/target/arm/tcg/helper-a64.c
@@ -31,6 +31,7 @@
#include "exec/cpu-common.h"
#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
+#include "exec/tlb-flags.h"
#include "qemu/int128.h"
#include "qemu/atomic128.h"
#include "fpu/softfloat.h"
diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c
index 80164a80504..888c6707547 100644
--- a/target/arm/tcg/mte_helper.c
+++ b/target/arm/tcg/mte_helper.c
@@ -31,6 +31,7 @@
#endif
#include "exec/cpu_ldst.h"
#include "exec/helper-proto.h"
+#include "exec/tlb-flags.h"
#include "accel/tcg/cpu-ops.h"
#include "qapi/error.h"
#include "qemu/guest-random.h"
diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c
index d786b4b1118..e3bed77b48e 100644
--- a/target/arm/tcg/sve_helper.c
+++ b/target/arm/tcg/sve_helper.c
@@ -23,6 +23,7 @@
#include "exec/exec-all.h"
#include "exec/page-protection.h"
#include "exec/helper-proto.h"
+#include "exec/tlb-flags.h"
#include "tcg/tcg-gvec-desc.h"
#include "fpu/softfloat.h"
#include "tcg/tcg.h"
diff --git a/target/i386/tcg/system/excp_helper.c b/target/i386/tcg/system/excp_helper.c
index 6876329de21..b0b74df72fd 100644
--- a/target/i386/tcg/system/excp_helper.c
+++ b/target/i386/tcg/system/excp_helper.c
@@ -22,6 +22,7 @@
#include "exec/cpu_ldst.h"
#include "exec/cputlb.h"
#include "exec/page-protection.h"
+#include "exec/tlb-flags.h"
#include "tcg/helper-tcg.h"
typedef struct TranslateParams {
diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
index 72dc48e58d3..f3d26b6b957 100644
--- a/target/riscv/op_helper.c
+++ b/target/riscv/op_helper.c
@@ -25,6 +25,7 @@
#include "exec/cputlb.h"
#include "exec/cpu_ldst.h"
#include "exec/helper-proto.h"
+#include "exec/tlb-flags.h"
#include "trace.h"
/* Exceptions processing helpers */
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 67b3bafebbe..83978be0603 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -25,6 +25,7 @@
#include "exec/cpu_ldst.h"
#include "exec/page-protection.h"
#include "exec/helper-proto.h"
+#include "exec/tlb-flags.h"
#include "fpu/softfloat.h"
#include "tcg/tcg-gvec-desc.h"
#include "internals.h"
diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c
index 8187b917ba1..0ff2e10d816 100644
--- a/target/s390x/tcg/mem_helper.c
+++ b/target/s390x/tcg/mem_helper.c
@@ -29,6 +29,7 @@
#include "exec/cputlb.h"
#include "exec/page-protection.h"
#include "exec/cpu_ldst.h"
+#include "exec/tlb-flags.h"
#include "accel/tcg/cpu-ops.h"
#include "qemu/int128.h"
#include "qemu/atomic128.h"
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 4a0cedd9e21..cce3046b694 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -23,6 +23,7 @@
#include "exec/cputlb.h"
#include "exec/cpu-mmu-index.h"
#include "exec/page-protection.h"
+#include "exec/tlb-flags.h"
#include "qemu/qemu-print.h"
#include "trace.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 02/29] exec/cpu-all: move cpu_copy to linux-user/qemu.h
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 01/29] exec/cpu-all: extract tlb flags defines to exec/tlb-flags.h Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 03/29] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c Pierrick Bouvier
` (28 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/cpu-all.h | 2 --
linux-user/qemu.h | 3 +++
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index d2895fb55b1..74017a5ce7c 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -32,8 +32,6 @@
#include "exec/cpu-defs.h"
#include "exec/target_page.h"
-CPUArchState *cpu_copy(CPUArchState *env);
-
#include "cpu.h"
/* Validate correct placement of CPUArchState. */
diff --git a/linux-user/qemu.h b/linux-user/qemu.h
index 5f007501518..948de8431a5 100644
--- a/linux-user/qemu.h
+++ b/linux-user/qemu.h
@@ -362,4 +362,7 @@ void *lock_user_string(abi_ulong guest_addr);
#define unlock_user_struct(host_ptr, guest_addr, copy) \
unlock_user(host_ptr, guest_addr, (copy) ? sizeof(*host_ptr) : 0)
+/* Clone cpu state */
+CPUArchState *cpu_copy(CPUArchState *env);
+
#endif /* QEMU_H */
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 03/29] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 01/29] exec/cpu-all: extract tlb flags defines to exec/tlb-flags.h Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 02/29] exec/cpu-all: move cpu_copy to linux-user/qemu.h Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-04-02 3:31 ` Philippe Mathieu-Daudé
2025-03-25 4:58 ` [PATCH v3 04/29] exec/cpu-all: remove system/memory include Pierrick Bouvier
` (27 subsequent siblings)
30 siblings, 1 reply; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/cpu-all.h | 4 ----
cpu-target.c | 4 ++++
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 74017a5ce7c..b1067259e6b 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -34,8 +34,4 @@
#include "cpu.h"
-/* Validate correct placement of CPUArchState. */
-QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
-QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));
-
#endif /* CPU_ALL_H */
diff --git a/cpu-target.c b/cpu-target.c
index 519b0f89005..587f24b34e5 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -29,6 +29,10 @@
#include "accel/accel-cpu-target.h"
#include "trace/trace-root.h"
+/* Validate correct placement of CPUArchState. */
+QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
+QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));
+
char *cpu_model_from_type(const char *typename)
{
const char *suffix = "-" CPU_RESOLVING_TYPE;
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* Re: [PATCH v3 03/29] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c
2025-03-25 4:58 ` [PATCH v3 03/29] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c Pierrick Bouvier
@ 2025-04-02 3:31 ` Philippe Mathieu-Daudé
2025-04-02 15:25 ` Pierrick Bouvier
0 siblings, 1 reply; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-02 3:31 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini, kvm,
Alex Bennée
On 25/3/25 05:58, Pierrick Bouvier wrote:
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> ---
> include/exec/cpu-all.h | 4 ----
> cpu-target.c | 4 ++++
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
> index 74017a5ce7c..b1067259e6b 100644
> --- a/include/exec/cpu-all.h
> +++ b/include/exec/cpu-all.h
> @@ -34,8 +34,4 @@
>
> #include "cpu.h"
This include ^^^^^^ ...
>
> -/* Validate correct placement of CPUArchState. */
> -QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
> -QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));
> -
> #endif /* CPU_ALL_H */
> diff --git a/cpu-target.c b/cpu-target.c
> index 519b0f89005..587f24b34e5 100644
> --- a/cpu-target.c
> +++ b/cpu-target.c
> @@ -29,6 +29,10 @@
> #include "accel/accel-cpu-target.h"
> #include "trace/trace-root.h"
... is also needed here, otherwise we get:
../../cpu-target.c:30:19: error: offsetof of incomplete type 'ArchCPU'
(aka 'struct ArchCPU')
30 | QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
| ^
>
> +/* Validate correct placement of CPUArchState. */>
+QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
> +QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));
> +
> char *cpu_model_from_type(const char *typename)
> {
> const char *suffix = "-" CPU_RESOLVING_TYPE;
With "cpu.h" include:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH v3 03/29] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c
2025-04-02 3:31 ` Philippe Mathieu-Daudé
@ 2025-04-02 15:25 ` Pierrick Bouvier
2025-04-02 20:06 ` Richard Henderson
0 siblings, 1 reply; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-02 15:25 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini, kvm,
Alex Bennée
On 4/1/25 20:31, Philippe Mathieu-Daudé wrote:
> On 25/3/25 05:58, Pierrick Bouvier wrote:
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>> ---
>> include/exec/cpu-all.h | 4 ----
>> cpu-target.c | 4 ++++
>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
>> index 74017a5ce7c..b1067259e6b 100644
>> --- a/include/exec/cpu-all.h
>> +++ b/include/exec/cpu-all.h
>> @@ -34,8 +34,4 @@
>>
>> #include "cpu.h"
>
> This include ^^^^^^ ...
>
>>
>> -/* Validate correct placement of CPUArchState. */
>> -QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
>> -QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));
>> -
>> #endif /* CPU_ALL_H */
>> diff --git a/cpu-target.c b/cpu-target.c
>> index 519b0f89005..587f24b34e5 100644
>> --- a/cpu-target.c
>> +++ b/cpu-target.c
>> @@ -29,6 +29,10 @@
>> #include "accel/accel-cpu-target.h"
>> #include "trace/trace-root.h"
>
> ... is also needed here, otherwise we get:
>
> ../../cpu-target.c:30:19: error: offsetof of incomplete type 'ArchCPU'
> (aka 'struct ArchCPU')
> 30 | QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
> | ^
>
>>
> > +/* Validate correct placement of CPUArchState. */>
> +QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0);
>> +QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState));
>> +
>> char *cpu_model_from_type(const char *typename)
>> {
>> const char *suffix = "-" CPU_RESOLVING_TYPE;
>
> With "cpu.h" include:
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>
I can't reproduce this error.
With this series, cpu.h is pulled transitively from
"accel/accel-cpu-target.h". Ideally, it would be better to add it
explicitely yes.
@Richard, could you please amend this commit on tcg-next and add a
direct include to cpu.h?
Thanks,
Pierrick
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH v3 03/29] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c
2025-04-02 15:25 ` Pierrick Bouvier
@ 2025-04-02 20:06 ` Richard Henderson
2025-04-03 16:18 ` Pierrick Bouvier
0 siblings, 1 reply; 36+ messages in thread
From: Richard Henderson @ 2025-04-02 20:06 UTC (permalink / raw)
To: Pierrick Bouvier, Philippe Mathieu-Daudé, qemu-devel
Cc: Peter Maydell, qemu-arm, Paolo Bonzini, kvm, Alex Bennée
On 4/2/25 08:25, Pierrick Bouvier wrote:
> On 4/1/25 20:31, Philippe Mathieu-Daudé wrote:
>> With "cpu.h" include:
>> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>
>
> I can't reproduce this error.
> With this series, cpu.h is pulled transitively from "accel/accel-cpu-target.h". Ideally,
> it would be better to add it explicitely yes.
>
> @Richard, could you please amend this commit on tcg-next and add a direct include to cpu.h?
Done.
r~
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH v3 03/29] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c
2025-04-02 20:06 ` Richard Henderson
@ 2025-04-03 16:18 ` Pierrick Bouvier
0 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-04-03 16:18 UTC (permalink / raw)
To: Richard Henderson, Philippe Mathieu-Daudé, qemu-devel
Cc: Peter Maydell, qemu-arm, Paolo Bonzini, kvm, Alex Bennée
On 4/2/25 13:06, Richard Henderson wrote:
> On 4/2/25 08:25, Pierrick Bouvier wrote:
>> On 4/1/25 20:31, Philippe Mathieu-Daudé wrote:
>>> With "cpu.h" include:
>>> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>>
>>
>> I can't reproduce this error.
>> With this series, cpu.h is pulled transitively from "accel/accel-cpu-target.h". Ideally,
>> it would be better to add it explicitely yes.
>>
>> @Richard, could you please amend this commit on tcg-next and add a direct include to cpu.h?
>
> Done.
>
Thanks Richard!
>
> r~
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH v3 04/29] exec/cpu-all: remove system/memory include
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (2 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 03/29] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 05/29] exec/cpu-all: remove exec/page-protection include Pierrick Bouvier
` (26 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
We include this header where needed. When includes set already have
ifdef CONFIG_USER_ONLY, we add it here, else, we don't condition the
include.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
hw/s390x/ipl.h | 1 +
include/exec/cpu-all.h | 3 ---
target/arm/internals.h | 1 +
target/hppa/cpu.h | 1 +
target/i386/hvf/vmx.h | 1 +
target/ppc/mmu-hash32.h | 2 ++
hw/ppc/spapr_ovec.c | 1 +
target/alpha/helper.c | 1 +
target/arm/hvf/hvf.c | 1 +
target/avr/helper.c | 1 +
target/i386/arch_memory_mapping.c | 1 +
target/i386/helper.c | 1 +
target/i386/tcg/system/misc_helper.c | 1 +
target/i386/tcg/system/tcg-cpu.c | 1 +
target/m68k/helper.c | 1 +
target/ppc/excp_helper.c | 1 +
target/ppc/mmu-book3s-v3.c | 1 +
target/ppc/mmu-hash64.c | 1 +
target/ppc/mmu-radix64.c | 1 +
target/riscv/cpu_helper.c | 1 +
target/sparc/ldst_helper.c | 1 +
target/sparc/mmu_helper.c | 1 +
target/xtensa/mmu_helper.c | 1 +
target/xtensa/op_helper.c | 1 +
24 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/hw/s390x/ipl.h b/hw/s390x/ipl.h
index c6ecb3433cc..6557ac3be5b 100644
--- a/hw/s390x/ipl.h
+++ b/hw/s390x/ipl.h
@@ -15,6 +15,7 @@
#include "cpu.h"
#include "system/address-spaces.h"
+#include "system/memory.h"
#include "hw/qdev-core.h"
#include "hw/s390x/ipl/qipl.h"
#include "qom/object.h"
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index b1067259e6b..eb029b65552 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -24,9 +24,6 @@
#include "exec/cpu-interrupt.h"
#include "exec/tswap.h"
#include "hw/core/cpu.h"
-#ifndef CONFIG_USER_ONLY
-#include "system/memory.h"
-#endif
/* page related stuff */
#include "exec/cpu-defs.h"
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 28585c07555..895d60218e3 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -28,6 +28,7 @@
#include "exec/breakpoint.h"
#include "hw/registerfields.h"
#include "tcg/tcg-gvec-desc.h"
+#include "system/memory.h"
#include "syndrome.h"
#include "cpu-features.h"
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 7be4a1d3800..bb997d07516 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "system/memory.h"
#include "qemu/cpu-float.h"
#include "qemu/interval-tree.h"
#include "hw/registerfields.h"
diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h
index 87a478f7fde..3ddf7982ff3 100644
--- a/target/i386/hvf/vmx.h
+++ b/target/i386/hvf/vmx.h
@@ -34,6 +34,7 @@
#include "system/hvf_int.h"
#include "system/address-spaces.h"
+#include "system/memory.h"
static inline uint64_t rreg(hv_vcpuid_t vcpu, hv_x86_reg_t reg)
{
diff --git a/target/ppc/mmu-hash32.h b/target/ppc/mmu-hash32.h
index 2838de031c7..04c23ea75ed 100644
--- a/target/ppc/mmu-hash32.h
+++ b/target/ppc/mmu-hash32.h
@@ -3,6 +3,8 @@
#ifndef CONFIG_USER_ONLY
+#include "system/memory.h"
+
bool ppc_hash32_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type,
hwaddr *raddrp, int *psizep, int *protp, int mmu_idx,
bool guest_visible);
diff --git a/hw/ppc/spapr_ovec.c b/hw/ppc/spapr_ovec.c
index 6d6eaf67cba..75ab4fe2623 100644
--- a/hw/ppc/spapr_ovec.c
+++ b/hw/ppc/spapr_ovec.c
@@ -16,6 +16,7 @@
#include "migration/vmstate.h"
#include "qemu/bitmap.h"
#include "system/address-spaces.h"
+#include "system/memory.h"
#include "qemu/error-report.h"
#include "trace.h"
#include <libfdt.h>
diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index 57cefcba144..f6261a3a53c 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -25,6 +25,7 @@
#include "fpu/softfloat-types.h"
#include "exec/helper-proto.h"
#include "qemu/qemu-print.h"
+#include "system/memory.h"
#define CONVERT_BIT(X, SRC, DST) \
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 93a3f9b53d4..34ca36fab55 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -23,6 +23,7 @@
#include <mach/mach_time.h>
#include "system/address-spaces.h"
+#include "system/memory.h"
#include "hw/boards.h"
#include "hw/irq.h"
#include "qemu/main-loop.h"
diff --git a/target/avr/helper.c b/target/avr/helper.c
index 6b90fa82c3d..64781bbf826 100644
--- a/target/avr/helper.c
+++ b/target/avr/helper.c
@@ -27,6 +27,7 @@
#include "exec/page-protection.h"
#include "exec/cpu_ldst.h"
#include "system/address-spaces.h"
+#include "system/memory.h"
#include "exec/helper-proto.h"
#include "qemu/plugin.h"
diff --git a/target/i386/arch_memory_mapping.c b/target/i386/arch_memory_mapping.c
index ced199862dd..a2398c21732 100644
--- a/target/i386/arch_memory_mapping.c
+++ b/target/i386/arch_memory_mapping.c
@@ -14,6 +14,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "system/memory_mapping.h"
+#include "system/memory.h"
/* PAE Paging or IA-32e Paging */
static void walk_pte(MemoryMappingList *list, AddressSpace *as,
diff --git a/target/i386/helper.c b/target/i386/helper.c
index c07b1b16ea1..64d9e8ab9c4 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -25,6 +25,7 @@
#include "system/runstate.h"
#ifndef CONFIG_USER_ONLY
#include "system/hw_accel.h"
+#include "system/memory.h"
#include "monitor/monitor.h"
#include "kvm/kvm_i386.h"
#endif
diff --git a/target/i386/tcg/system/misc_helper.c b/target/i386/tcg/system/misc_helper.c
index 0555cf26041..67896c8c875 100644
--- a/target/i386/tcg/system/misc_helper.c
+++ b/target/i386/tcg/system/misc_helper.c
@@ -23,6 +23,7 @@
#include "exec/helper-proto.h"
#include "exec/cpu_ldst.h"
#include "system/address-spaces.h"
+#include "system/memory.h"
#include "exec/cputlb.h"
#include "tcg/helper-tcg.h"
#include "hw/i386/apic.h"
diff --git a/target/i386/tcg/system/tcg-cpu.c b/target/i386/tcg/system/tcg-cpu.c
index ab1f3c7c595..0538a4fd51a 100644
--- a/target/i386/tcg/system/tcg-cpu.c
+++ b/target/i386/tcg/system/tcg-cpu.c
@@ -24,6 +24,7 @@
#include "system/system.h"
#include "qemu/units.h"
#include "system/address-spaces.h"
+#include "system/memory.h"
#include "tcg/tcg-cpu.h"
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 0bf574830f9..82512722191 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -25,6 +25,7 @@
#include "exec/page-protection.h"
#include "exec/gdbstub.h"
#include "exec/helper-proto.h"
+#include "system/memory.h"
#include "gdbstub/helpers.h"
#include "fpu/softfloat.h"
#include "qemu/qemu-print.h"
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index c941c89806e..da8b525a41b 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "qemu/main-loop.h"
#include "qemu/log.h"
+#include "system/memory.h"
#include "system/tcg.h"
#include "system/system.h"
#include "system/runstate.h"
diff --git a/target/ppc/mmu-book3s-v3.c b/target/ppc/mmu-book3s-v3.c
index a812cb51139..38655563105 100644
--- a/target/ppc/mmu-book3s-v3.c
+++ b/target/ppc/mmu-book3s-v3.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "system/memory.h"
#include "cpu.h"
#include "mmu-hash64.h"
#include "mmu-book3s-v3.h"
diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
index 5ca4faee2ab..3ba4810497e 100644
--- a/target/ppc/mmu-hash64.c
+++ b/target/ppc/mmu-hash64.c
@@ -25,6 +25,7 @@
#include "qemu/error-report.h"
#include "qemu/qemu-print.h"
#include "system/hw_accel.h"
+#include "system/memory.h"
#include "kvm_ppc.h"
#include "mmu-hash64.h"
#include "exec/log.h"
diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index 461eda4a3dc..4ab5f3bb920 100644
--- a/target/ppc/mmu-radix64.c
+++ b/target/ppc/mmu-radix64.c
@@ -23,6 +23,7 @@
#include "exec/page-protection.h"
#include "qemu/error-report.h"
#include "system/kvm.h"
+#include "system/memory.h"
#include "kvm_ppc.h"
#include "exec/log.h"
#include "internal.h"
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 0dd8645994d..ca58094fb54 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -26,6 +26,7 @@
#include "exec/cputlb.h"
#include "exec/exec-all.h"
#include "exec/page-protection.h"
+#include "system/memory.h"
#include "instmap.h"
#include "tcg/tcg-op.h"
#include "accel/tcg/cpu-ops.h"
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index b559afc9a94..eda5f103f10 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -27,6 +27,7 @@
#include "exec/cputlb.h"
#include "exec/page-protection.h"
#include "exec/cpu_ldst.h"
+#include "system/memory.h"
#ifdef CONFIG_USER_ONLY
#include "user/page-protection.h"
#endif
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index cce3046b694..48fb2179b2d 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -24,6 +24,7 @@
#include "exec/cpu-mmu-index.h"
#include "exec/page-protection.h"
#include "exec/tlb-flags.h"
+#include "system/memory.h"
#include "qemu/qemu-print.h"
#include "trace.h"
diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c
index 96140c89c76..72910fb1c80 100644
--- a/target/xtensa/mmu_helper.c
+++ b/target/xtensa/mmu_helper.c
@@ -36,6 +36,7 @@
#include "exec/cpu-mmu-index.h"
#include "exec/exec-all.h"
#include "exec/page-protection.h"
+#include "system/memory.h"
#define XTENSA_MPU_SEGMENT_MASK 0x0000001f
#define XTENSA_MPU_ACC_RIGHTS_MASK 0x00000f00
diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c
index 028d4e0a1c7..c125fa49464 100644
--- a/target/xtensa/op_helper.c
+++ b/target/xtensa/op_helper.c
@@ -31,6 +31,7 @@
#include "exec/page-protection.h"
#include "qemu/host-utils.h"
#include "exec/exec-all.h"
+#include "system/memory.h"
#include "qemu/atomic.h"
#include "qemu/timer.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 05/29] exec/cpu-all: remove exec/page-protection include
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (3 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 04/29] exec/cpu-all: remove system/memory include Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 06/29] exec/cpu-all: remove tswap include Pierrick Bouvier
` (25 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index eb029b65552..4a2cac1252d 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -19,7 +19,6 @@
#ifndef CPU_ALL_H
#define CPU_ALL_H
-#include "exec/page-protection.h"
#include "exec/cpu-common.h"
#include "exec/cpu-interrupt.h"
#include "exec/tswap.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 06/29] exec/cpu-all: remove tswap include
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (4 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 05/29] exec/cpu-all: remove exec/page-protection include Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 07/29] exec/cpu-all: remove exec/cpu-interrupt include Pierrick Bouvier
` (24 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/cpu-all.h | 1 -
target/ppc/mmu-hash64.h | 2 ++
target/i386/tcg/system/excp_helper.c | 1 +
target/i386/xsave_helper.c | 1 +
target/riscv/vector_helper.c | 1 +
5 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 4a2cac1252d..1539574a22a 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -21,7 +21,6 @@
#include "exec/cpu-common.h"
#include "exec/cpu-interrupt.h"
-#include "exec/tswap.h"
#include "hw/core/cpu.h"
/* page related stuff */
diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h
index ae8d4b37aed..b8fb12a9705 100644
--- a/target/ppc/mmu-hash64.h
+++ b/target/ppc/mmu-hash64.h
@@ -1,6 +1,8 @@
#ifndef MMU_HASH64_H
#define MMU_HASH64_H
+#include "exec/tswap.h"
+
#ifndef CONFIG_USER_ONLY
#ifdef TARGET_PPC64
diff --git a/target/i386/tcg/system/excp_helper.c b/target/i386/tcg/system/excp_helper.c
index b0b74df72fd..4badd739432 100644
--- a/target/i386/tcg/system/excp_helper.c
+++ b/target/i386/tcg/system/excp_helper.c
@@ -23,6 +23,7 @@
#include "exec/cputlb.h"
#include "exec/page-protection.h"
#include "exec/tlb-flags.h"
+#include "exec/tswap.h"
#include "tcg/helper-tcg.h"
typedef struct TranslateParams {
diff --git a/target/i386/xsave_helper.c b/target/i386/xsave_helper.c
index 996e9f3bfef..24ab7be8e9a 100644
--- a/target/i386/xsave_helper.c
+++ b/target/i386/xsave_helper.c
@@ -5,6 +5,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/tswap.h"
void x86_cpu_xsave_all_areas(X86CPU *cpu, void *buf, uint32_t buflen)
{
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 83978be0603..7fffa23bc8d 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -26,6 +26,7 @@
#include "exec/page-protection.h"
#include "exec/helper-proto.h"
#include "exec/tlb-flags.h"
+#include "exec/tswap.h"
#include "fpu/softfloat.h"
#include "tcg/tcg-gvec-desc.h"
#include "internals.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 07/29] exec/cpu-all: remove exec/cpu-interrupt include
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (5 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 06/29] exec/cpu-all: remove tswap include Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 08/29] exec/cpu-all: remove exec/cpu-defs include Pierrick Bouvier
` (23 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/cpu-all.h | 1 -
target/alpha/cpu.h | 1 +
target/arm/cpu.h | 1 +
target/avr/cpu.h | 1 +
target/hppa/cpu.h | 1 +
target/i386/cpu.h | 1 +
target/loongarch/cpu.h | 1 +
target/m68k/cpu.h | 1 +
target/microblaze/cpu.h | 1 +
target/mips/cpu.h | 1 +
target/openrisc/cpu.h | 1 +
target/ppc/cpu.h | 1 +
target/riscv/cpu.h | 1 +
target/rx/cpu.h | 1 +
target/s390x/cpu.h | 1 +
target/sh4/cpu.h | 1 +
target/sparc/cpu.h | 1 +
target/xtensa/cpu.h | 1 +
accel/tcg/cpu-exec.c | 1 +
hw/alpha/typhoon.c | 1 +
hw/m68k/next-cube.c | 1 +
hw/ppc/ppc.c | 1 +
hw/xtensa/pic_cpu.c | 1 +
23 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 1539574a22a..e5d852fbe2c 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -20,7 +20,6 @@
#define CPU_ALL_H
#include "exec/cpu-common.h"
-#include "exec/cpu-interrupt.h"
#include "hw/core/cpu.h"
/* page related stuff */
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 80562adfb5c..42788a6a0bc 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
#define ICACHE_LINE_SIZE 32
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index a8177c6c2e8..958a921490e 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -25,6 +25,7 @@
#include "hw/registerfields.h"
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "exec/gdbstub.h"
#include "exec/page-protection.h"
#include "qapi/qapi-types-common.h"
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index 06f5ae4d1b1..714c6821e2f 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -23,6 +23,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#ifdef CONFIG_USER_ONLY
#error "AVR 8-bit does not support user mode"
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index bb997d07516..986dc655fc1 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "system/memory.h"
#include "qemu/cpu-float.h"
#include "qemu/interval-tree.h"
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 76f24446a55..64706bd6e5d 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -24,6 +24,7 @@
#include "cpu-qom.h"
#include "kvm/hyperv-proto.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "exec/memop.h"
#include "hw/i386/topology.h"
#include "qapi/qapi-types-common.h"
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 1916716547a..1dba8ac6a7c 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -10,6 +10,7 @@
#include "qemu/int128.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "fpu/softfloat-types.h"
#include "hw/registerfields.h"
#include "qemu/timer.h"
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index ddb0f29f4a3..451644a05a3 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -22,6 +22,7 @@
#define M68K_CPU_H
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
#include "cpu-qom.h"
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index e44ddd53078..d29681abed4 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -23,6 +23,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
+#include "exec/cpu-interrupt.h"
typedef struct CPUArchState CPUMBState;
#if !defined(CONFIG_USER_ONLY)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 9ef72a95d71..29362498ec4 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -3,6 +3,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#ifndef CONFIG_USER_ONLY
#include "system/memory.h"
#endif
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index b97d2ffdd26..c153823b629 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "fpu/softfloat-types.h"
/**
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 3ee83517dcd..7489ba95648 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -23,6 +23,7 @@
#include "qemu/int128.h"
#include "qemu/cpu-float.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "cpu-qom.h"
#include "qom/object.h"
#include "hw/registerfields.h"
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 51e49e03dec..556eda57e94 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -24,6 +24,7 @@
#include "hw/registerfields.h"
#include "hw/qdev-properties.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "exec/gdbstub.h"
#include "qemu/cpu-float.h"
#include "qom/object.h"
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index 349d61c4e40..5f2fcb66563 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -24,6 +24,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
#ifdef CONFIG_USER_ONLY
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 5b7992deda6..0a32ad4c613 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -28,6 +28,7 @@
#include "cpu-qom.h"
#include "cpu_models.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
#include "qapi/qapi-types-machine-common.h"
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index d536d5d7154..18557d8c386 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
/* CPU Subtypes */
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 462bcb6c0e6..923836f47c8 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -4,6 +4,7 @@
#include "qemu/bswap.h"
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
#if !defined(TARGET_SPARC64)
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 8d70bfc0cd4..66846314786 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -31,6 +31,7 @@
#include "cpu-qom.h"
#include "qemu/cpu-float.h"
#include "exec/cpu-defs.h"
+#include "exec/cpu-interrupt.h"
#include "hw/clock.h"
#include "xtensa-isa.h"
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 034c2ded6b1..207416e0212 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -26,6 +26,7 @@
#include "trace.h"
#include "disas/disas.h"
#include "exec/cpu-common.h"
+#include "exec/cpu-interrupt.h"
#include "exec/page-protection.h"
#include "exec/mmap-lock.h"
#include "exec/translation-block.h"
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index e8711ae16a3..9718e1a579c 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -9,6 +9,7 @@
#include "qemu/osdep.h"
#include "qemu/module.h"
#include "qemu/units.h"
+#include "exec/cpu-interrupt.h"
#include "qapi/error.h"
#include "hw/pci/pci_host.h"
#include "cpu.h"
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 0570e4a76f1..4ae5668331b 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -12,6 +12,7 @@
#include "qemu/osdep.h"
#include "exec/hwaddr.h"
+#include "exec/cpu-interrupt.h"
#include "system/system.h"
#include "system/qtest.h"
#include "hw/irq.h"
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index 3a80931538f..43d0d0e7553 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -27,6 +27,7 @@
#include "hw/ppc/ppc.h"
#include "hw/ppc/ppc_e500.h"
#include "qemu/timer.h"
+#include "exec/cpu-interrupt.h"
#include "system/cpus.h"
#include "qemu/log.h"
#include "qemu/main-loop.h"
diff --git a/hw/xtensa/pic_cpu.c b/hw/xtensa/pic_cpu.c
index 8cef88c61bc..e3885316106 100644
--- a/hw/xtensa/pic_cpu.c
+++ b/hw/xtensa/pic_cpu.c
@@ -27,6 +27,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/cpu-interrupt.h"
#include "hw/irq.h"
#include "qemu/log.h"
#include "qemu/timer.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 08/29] exec/cpu-all: remove exec/cpu-defs include
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (6 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 07/29] exec/cpu-all: remove exec/cpu-interrupt include Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 09/29] exec/cpu-all: remove exec/target_page include Pierrick Bouvier
` (22 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index e5d852fbe2c..db44c0d3016 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -23,7 +23,6 @@
#include "hw/core/cpu.h"
/* page related stuff */
-#include "exec/cpu-defs.h"
#include "exec/target_page.h"
#include "cpu.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 09/29] exec/cpu-all: remove exec/target_page include
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (7 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 08/29] exec/cpu-all: remove exec/cpu-defs include Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 10/29] exec/cpu-all: remove hw/core/cpu.h include Pierrick Bouvier
` (21 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
hw/s390x/ipl.h | 1 +
include/exec/cpu-all.h | 3 ---
include/exec/exec-all.h | 1 +
include/exec/tlb-flags.h | 1 +
linux-user/sparc/target_syscall.h | 2 ++
hw/alpha/dp264.c | 1 +
hw/arm/boot.c | 1 +
hw/arm/smmuv3.c | 1 +
hw/hppa/machine.c | 1 +
hw/i386/multiboot.c | 1 +
hw/i386/pc.c | 1 +
hw/i386/pc_sysfw_ovmf.c | 1 +
hw/i386/vapic.c | 1 +
hw/loongarch/virt.c | 1 +
hw/m68k/q800.c | 1 +
hw/m68k/virt.c | 1 +
hw/openrisc/boot.c | 1 +
hw/pci-host/astro.c | 1 +
hw/ppc/e500.c | 1 +
hw/ppc/mac_newworld.c | 1 +
hw/ppc/mac_oldworld.c | 1 +
hw/ppc/ppc_booke.c | 1 +
hw/ppc/prep.c | 1 +
hw/ppc/spapr_hcall.c | 1 +
hw/riscv/riscv-iommu-pci.c | 1 +
hw/riscv/riscv-iommu.c | 1 +
hw/s390x/s390-pci-bus.c | 1 +
hw/s390x/s390-pci-inst.c | 1 +
hw/s390x/s390-skeys.c | 1 +
hw/sparc/sun4m.c | 1 +
hw/sparc64/sun4u.c | 1 +
monitor/hmp-cmds-target.c | 1 +
target/alpha/helper.c | 1 +
target/arm/gdbstub64.c | 1 +
target/arm/tcg/tlb-insns.c | 1 +
target/avr/helper.c | 1 +
target/hexagon/translate.c | 1 +
target/i386/helper.c | 1 +
target/i386/hvf/hvf.c | 1 +
target/i386/kvm/hyperv.c | 1 +
target/i386/kvm/kvm.c | 1 +
target/i386/kvm/xen-emu.c | 1 +
target/i386/sev.c | 1 +
target/loongarch/cpu_helper.c | 1 +
target/loongarch/tcg/translate.c | 1 +
target/microblaze/helper.c | 1 +
target/microblaze/mmu.c | 1 +
target/mips/tcg/system/cp0_helper.c | 1 +
target/mips/tcg/translate.c | 1 +
target/openrisc/mmu.c | 1 +
target/riscv/pmp.c | 1 +
target/rx/cpu.c | 1 +
target/s390x/helper.c | 1 +
target/s390x/ioinst.c | 1 +
target/tricore/helper.c | 1 +
target/xtensa/helper.c | 1 +
target/xtensa/xtensa-semi.c | 1 +
57 files changed, 57 insertions(+), 3 deletions(-)
diff --git a/hw/s390x/ipl.h b/hw/s390x/ipl.h
index 6557ac3be5b..cb55101f062 100644
--- a/hw/s390x/ipl.h
+++ b/hw/s390x/ipl.h
@@ -14,6 +14,7 @@
#define HW_S390_IPL_H
#include "cpu.h"
+#include "exec/target_page.h"
#include "system/address-spaces.h"
#include "system/memory.h"
#include "hw/qdev-core.h"
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index db44c0d3016..d4705210370 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -22,9 +22,6 @@
#include "exec/cpu-common.h"
#include "hw/core/cpu.h"
-/* page related stuff */
-#include "exec/target_page.h"
-
#include "cpu.h"
#endif /* CPU_ALL_H */
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 19b0eda44a7..c00683f74b0 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -24,6 +24,7 @@
#include "exec/cpu_ldst.h"
#endif
#include "exec/mmu-access-type.h"
+#include "exec/target_page.h"
#include "exec/translation-block.h"
#if defined(CONFIG_TCG)
diff --git a/include/exec/tlb-flags.h b/include/exec/tlb-flags.h
index c371ae77602..2273144f421 100644
--- a/include/exec/tlb-flags.h
+++ b/include/exec/tlb-flags.h
@@ -20,6 +20,7 @@
#define TLB_FLAGS_H
#include "exec/cpu-defs.h"
+#include "exec/target_page.h"
#ifdef CONFIG_USER_ONLY
diff --git a/linux-user/sparc/target_syscall.h b/linux-user/sparc/target_syscall.h
index e4211653574..c22ede1ddd2 100644
--- a/linux-user/sparc/target_syscall.h
+++ b/linux-user/sparc/target_syscall.h
@@ -1,6 +1,8 @@
#ifndef SPARC_TARGET_SYSCALL_H
#define SPARC_TARGET_SYSCALL_H
+#include "exec/target_page.h"
+
#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
struct target_pt_regs {
abi_ulong u_regs[16];
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 570ea9edf24..c1e24a4ffe8 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -15,6 +15,7 @@
#include "hw/rtc/mc146818rtc.h"
#include "hw/ide/pci.h"
#include "hw/isa/superio.h"
+#include "exec/target_page.h"
#include "net/net.h"
#include "qemu/cutils.h"
#include "qemu/datadir.h"
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index e296b62fa12..d3811b896fd 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -14,6 +14,7 @@
#include <libfdt.h>
#include "hw/arm/boot.h"
#include "hw/arm/linux-boot-if.h"
+#include "exec/target_page.h"
#include "system/kvm.h"
#include "system/tcg.h"
#include "system/system.h"
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 704469abf19..62d0b3933ca 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -25,6 +25,7 @@
#include "hw/qdev-core.h"
#include "hw/pci/pci.h"
#include "cpu.h"
+#include "exec/target_page.h"
#include "trace.h"
#include "qemu/log.h"
#include "qemu/error-report.h"
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index c5f247633eb..c430bf28dd2 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -11,6 +11,7 @@
#include "elf.h"
#include "hw/loader.h"
#include "qemu/error-report.h"
+#include "exec/target_page.h"
#include "system/reset.h"
#include "system/system.h"
#include "system/qtest.h"
diff --git a/hw/i386/multiboot.c b/hw/i386/multiboot.c
index cd07a058614..6e6b96bc345 100644
--- a/hw/i386/multiboot.c
+++ b/hw/i386/multiboot.c
@@ -29,6 +29,7 @@
#include "multiboot.h"
#include "hw/loader.h"
#include "elf.h"
+#include "exec/target_page.h"
#include "system/system.h"
#include "qemu/error-report.h"
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 01d0581f62a..3b98089e908 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
+#include "exec/target_page.h"
#include "hw/i386/pc.h"
#include "hw/char/serial-isa.h"
#include "hw/char/parallel.h"
diff --git a/hw/i386/pc_sysfw_ovmf.c b/hw/i386/pc_sysfw_ovmf.c
index 07a4c267faa..da947c3ca41 100644
--- a/hw/i386/pc_sysfw_ovmf.c
+++ b/hw/i386/pc_sysfw_ovmf.c
@@ -26,6 +26,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "hw/i386/pc.h"
+#include "exec/target_page.h"
#include "cpu.h"
#define OVMF_TABLE_FOOTER_GUID "96b582de-1fb2-45f7-baea-a366c55a082d"
diff --git a/hw/i386/vapic.c b/hw/i386/vapic.c
index 26aae64e5d8..347431eeef3 100644
--- a/hw/i386/vapic.c
+++ b/hw/i386/vapic.c
@@ -11,6 +11,7 @@
#include "qemu/osdep.h"
#include "qemu/module.h"
+#include "exec/target_page.h"
#include "system/system.h"
#include "system/cpus.h"
#include "system/hw_accel.h"
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index ddf3f1f6e0a..27f72049f34 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -8,6 +8,7 @@
#include "qemu/units.h"
#include "qemu/datadir.h"
#include "qapi/error.h"
+#include "exec/target_page.h"
#include "hw/boards.h"
#include "hw/char/serial-mm.h"
#include "system/kvm.h"
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index aeed4c8ddb8..c2e365a8205 100644
--- a/hw/m68k/q800.c
+++ b/hw/m68k/q800.c
@@ -24,6 +24,7 @@
#include "qemu/units.h"
#include "qemu/datadir.h"
#include "qemu/guest-random.h"
+#include "exec/target_page.h"
#include "system/system.h"
#include "cpu.h"
#include "hw/boards.h"
diff --git a/hw/m68k/virt.c b/hw/m68k/virt.c
index d967bdd7438..911f018c03e 100644
--- a/hw/m68k/virt.c
+++ b/hw/m68k/virt.c
@@ -14,6 +14,7 @@
#include "cpu.h"
#include "hw/boards.h"
#include "hw/qdev-properties.h"
+#include "exec/target_page.h"
#include "elf.h"
#include "hw/loader.h"
#include "ui/console.h"
diff --git a/hw/openrisc/boot.c b/hw/openrisc/boot.c
index 0a5881be314..c81efe8138a 100644
--- a/hw/openrisc/boot.c
+++ b/hw/openrisc/boot.c
@@ -9,6 +9,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/cpu-defs.h"
+#include "exec/target_page.h"
#include "elf.h"
#include "hw/loader.h"
#include "hw/openrisc/boot.h"
diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c
index 039cc3ad01d..eef154335f9 100644
--- a/hw/pci-host/astro.c
+++ b/hw/pci-host/astro.c
@@ -31,6 +31,7 @@
#include "hw/qdev-properties.h"
#include "hw/pci-host/astro.h"
#include "hw/hppa/hppa_hardware.h"
+#include "exec/target_page.h"
#include "migration/vmstate.h"
#include "target/hppa/cpu.h"
#include "trace.h"
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 69269aa24c4..f77b2cb9233 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -26,6 +26,7 @@
#include "hw/block/flash.h"
#include "hw/char/serial-mm.h"
#include "hw/pci/pci.h"
+#include "exec/target_page.h"
#include "system/block-backend-io.h"
#include "system/system.h"
#include "system/kvm.h"
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 2d5309d6f55..023105416e0 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -59,6 +59,7 @@
#include "hw/ppc/mac_dbdma.h"
#include "hw/pci/pci.h"
#include "net/net.h"
+#include "exec/target_page.h"
#include "system/system.h"
#include "hw/nvram/fw_cfg.h"
#include "hw/char/escc.h"
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index b5814690f5a..a461c193da8 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -32,6 +32,7 @@
#include "hw/qdev-properties.h"
#include "hw/boards.h"
#include "hw/input/adb.h"
+#include "exec/target_page.h"
#include "system/system.h"
#include "net/net.h"
#include "hw/isa/isa.h"
diff --git a/hw/ppc/ppc_booke.c b/hw/ppc/ppc_booke.c
index 925e670ba0a..8b9467753f3 100644
--- a/hw/ppc/ppc_booke.c
+++ b/hw/ppc/ppc_booke.c
@@ -26,6 +26,7 @@
#include "cpu.h"
#include "hw/ppc/ppc.h"
#include "qemu/timer.h"
+#include "exec/target_page.h"
#include "system/reset.h"
#include "system/runstate.h"
#include "hw/loader.h"
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 3e68d8e6e20..50e86cafd5f 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -32,6 +32,7 @@
#include "hw/pci/pci_host.h"
#include "hw/ppc/ppc.h"
#include "hw/boards.h"
+#include "exec/target_page.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 406aea4ecbe..fb949a760ef 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -1,6 +1,7 @@
#include "qemu/osdep.h"
#include "qemu/cutils.h"
#include "qapi/error.h"
+#include "exec/target_page.h"
#include "system/hw_accel.h"
#include "system/runstate.h"
#include "system/tcg.h"
diff --git a/hw/riscv/riscv-iommu-pci.c b/hw/riscv/riscv-iommu-pci.c
index 12451869e41..e49f593446c 100644
--- a/hw/riscv/riscv-iommu-pci.c
+++ b/hw/riscv/riscv-iommu-pci.c
@@ -27,6 +27,7 @@
#include "qemu/error-report.h"
#include "qemu/host-utils.h"
#include "qom/object.h"
+#include "exec/target_page.h"
#include "cpu_bits.h"
#include "riscv-iommu.h"
diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
index 76e0fcd8733..92260f4e285 100644
--- a/hw/riscv/riscv-iommu.c
+++ b/hw/riscv/riscv-iommu.c
@@ -25,6 +25,7 @@
#include "migration/vmstate.h"
#include "qapi/error.h"
#include "qemu/timer.h"
+#include "exec/target_page.h"
#include "cpu_bits.h"
#include "riscv-iommu.h"
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 2591ee49c11..8d460576b1c 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -26,6 +26,7 @@
#include "hw/pci/msi.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
+#include "exec/target_page.h"
#include "system/reset.h"
#include "system/runstate.h"
diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c
index b4e003c19c9..2f23a4d0768 100644
--- a/hw/s390x/s390-pci-inst.c
+++ b/hw/s390x/s390-pci-inst.c
@@ -23,6 +23,7 @@
#include "hw/s390x/s390-pci-kvm.h"
#include "hw/s390x/s390-pci-vfio.h"
#include "hw/s390x/tod.h"
+#include "exec/target_page.h"
#include "trace.h"
diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c
index 425e3e4a878..d21bcffa7b9 100644
--- a/hw/s390x/s390-skeys.c
+++ b/hw/s390x/s390-skeys.c
@@ -18,6 +18,7 @@
#include "qapi/qapi-commands-misc-target.h"
#include "qobject/qdict.h"
#include "qemu/error-report.h"
+#include "exec/target_page.h"
#include "system/memory_mapping.h"
#include "system/address-spaces.h"
#include "system/kvm.h"
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 5aaafb40dac..126fcc34c03 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -35,6 +35,7 @@
#include "migration/vmstate.h"
#include "hw/sparc/sparc32_dma.h"
#include "hw/block/fdc.h"
+#include "exec/target_page.h"
#include "system/reset.h"
#include "system/runstate.h"
#include "system/system.h"
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index d3cb7270ff5..becdf3ea980 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -28,6 +28,7 @@
#include "qapi/error.h"
#include "qemu/datadir.h"
#include "cpu.h"
+#include "exec/target_page.h"
#include "hw/irq.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_bridge.h"
diff --git a/monitor/hmp-cmds-target.c b/monitor/hmp-cmds-target.c
index 011a367357e..8e4d8f66309 100644
--- a/monitor/hmp-cmds-target.c
+++ b/monitor/hmp-cmds-target.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "disas/disas.h"
+#include "exec/target_page.h"
#include "system/address-spaces.h"
#include "system/memory.h"
#include "monitor/hmp-target.h"
diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index f6261a3a53c..096eac34458 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -22,6 +22,7 @@
#include "cpu.h"
#include "exec/cputlb.h"
#include "exec/page-protection.h"
+#include "exec/target_page.h"
#include "fpu/softfloat-types.h"
#include "exec/helper-proto.h"
#include "qemu/qemu-print.h"
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index a9d8352b766..cb596d96ea9 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "cpu.h"
+#include "exec/target_page.h"
#include "internals.h"
#include "gdbstub/helpers.h"
#include "gdbstub/commands.h"
diff --git a/target/arm/tcg/tlb-insns.c b/target/arm/tcg/tlb-insns.c
index 630a481f0f8..0407ad5542d 100644
--- a/target/arm/tcg/tlb-insns.c
+++ b/target/arm/tcg/tlb-insns.c
@@ -8,6 +8,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "exec/cputlb.h"
+#include "exec/target_page.h"
#include "cpu.h"
#include "internals.h"
#include "cpu-features.h"
diff --git a/target/avr/helper.c b/target/avr/helper.c
index 64781bbf826..1ea7a258d1d 100644
--- a/target/avr/helper.c
+++ b/target/avr/helper.c
@@ -26,6 +26,7 @@
#include "exec/cputlb.h"
#include "exec/page-protection.h"
#include "exec/cpu_ldst.h"
+#include "exec/target_page.h"
#include "system/address-spaces.h"
#include "system/memory.h"
#include "exec/helper-proto.h"
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
index fe7858703c8..deb945829ee 100644
--- a/target/hexagon/translate.c
+++ b/target/hexagon/translate.c
@@ -22,6 +22,7 @@
#include "tcg/tcg-op-gvec.h"
#include "exec/helper-gen.h"
#include "exec/helper-proto.h"
+#include "exec/target_page.h"
#include "exec/translation-block.h"
#include "exec/cpu_ldst.h"
#include "exec/log.h"
diff --git a/target/i386/helper.c b/target/i386/helper.c
index 64d9e8ab9c4..265b3c1466f 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -21,6 +21,7 @@
#include "qapi/qapi-events-run-state.h"
#include "cpu.h"
#include "exec/cputlb.h"
+#include "exec/target_page.h"
#include "exec/translation-block.h"
#include "system/runstate.h"
#ifndef CONFIG_USER_ONLY
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index 9ba0e04ac75..638a1d0e5ea 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -76,6 +76,7 @@
#include "qemu/main-loop.h"
#include "qemu/accel.h"
#include "target/i386/cpu.h"
+#include "exec/target_page.h"
static Error *invtsc_mig_blocker;
diff --git a/target/i386/kvm/hyperv.c b/target/i386/kvm/hyperv.c
index 70b89cacf94..9865120cc43 100644
--- a/target/i386/kvm/hyperv.c
+++ b/target/i386/kvm/hyperv.c
@@ -13,6 +13,7 @@
#include "qemu/osdep.h"
#include "qemu/main-loop.h"
+#include "exec/target_page.h"
#include "hyperv.h"
#include "hw/hyperv/hyperv.h"
#include "hyperv-proto.h"
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 6c749d4ee81..c9a3c02e3e3 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -67,6 +67,7 @@
#include "hw/pci/msix.h"
#include "migration/blocker.h"
#include "exec/memattrs.h"
+#include "exec/target_page.h"
#include "trace.h"
#include CONFIG_DEVICES
diff --git a/target/i386/kvm/xen-emu.c b/target/i386/kvm/xen-emu.c
index b23010374f1..0918b7aa9c4 100644
--- a/target/i386/kvm/xen-emu.c
+++ b/target/i386/kvm/xen-emu.c
@@ -14,6 +14,7 @@
#include "qemu/main-loop.h"
#include "qemu/error-report.h"
#include "hw/xen/xen.h"
+#include "exec/target_page.h"
#include "system/kvm_int.h"
#include "system/kvm_xen.h"
#include "kvm/kvm_i386.h"
diff --git a/target/i386/sev.c b/target/i386/sev.c
index ba88976e9f7..878dd20f2c9 100644
--- a/target/i386/sev.c
+++ b/target/i386/sev.c
@@ -26,6 +26,7 @@
#include "qemu/uuid.h"
#include "qemu/error-report.h"
#include "crypto/hash.h"
+#include "exec/target_page.h"
#include "system/kvm.h"
#include "kvm/kvm_i386.h"
#include "sev.h"
diff --git a/target/loongarch/cpu_helper.c b/target/loongarch/cpu_helper.c
index 8662fb36ed6..4597e29b153 100644
--- a/target/loongarch/cpu_helper.c
+++ b/target/loongarch/cpu_helper.c
@@ -9,6 +9,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/cpu-mmu-index.h"
+#include "exec/target_page.h"
#include "internals.h"
#include "cpu-csr.h"
diff --git a/target/loongarch/tcg/translate.c b/target/loongarch/tcg/translate.c
index e59e4ed25b1..03573bbf81f 100644
--- a/target/loongarch/tcg/translate.c
+++ b/target/loongarch/tcg/translate.c
@@ -9,6 +9,7 @@
#include "cpu.h"
#include "tcg/tcg-op.h"
#include "tcg/tcg-op-gvec.h"
+#include "exec/target_page.h"
#include "exec/translation-block.h"
#include "exec/translator.h"
#include "exec/helper-proto.h"
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 996514ffe88..9e6969ccc9a 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -23,6 +23,7 @@
#include "exec/cputlb.h"
#include "exec/cpu-mmu-index.h"
#include "exec/page-protection.h"
+#include "exec/target_page.h"
#include "qemu/host-utils.h"
#include "exec/log.h"
diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
index 987ac9e3a73..7f20c4e4c69 100644
--- a/target/microblaze/mmu.c
+++ b/target/microblaze/mmu.c
@@ -24,6 +24,7 @@
#include "exec/cputlb.h"
#include "exec/cpu-mmu-index.h"
#include "exec/page-protection.h"
+#include "exec/target_page.h"
static unsigned int tlb_decode_size(unsigned int f)
{
diff --git a/target/mips/tcg/system/cp0_helper.c b/target/mips/tcg/system/cp0_helper.c
index 01a07a169f6..0ff86686f3f 100644
--- a/target/mips/tcg/system/cp0_helper.c
+++ b/target/mips/tcg/system/cp0_helper.c
@@ -28,6 +28,7 @@
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
#include "exec/cputlb.h"
+#include "exec/target_page.h"
/* SMP helpers. */
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 78b848a6d9a..d0a166ef537 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -26,6 +26,7 @@
#include "translate.h"
#include "internal.h"
#include "exec/helper-proto.h"
+#include "exec/target_page.h"
#include "exec/translation-block.h"
#include "semihosting/semihost.h"
#include "trace.h"
diff --git a/target/openrisc/mmu.c b/target/openrisc/mmu.c
index 47ac783c525..acea50c41eb 100644
--- a/target/openrisc/mmu.c
+++ b/target/openrisc/mmu.c
@@ -23,6 +23,7 @@
#include "cpu.h"
#include "exec/cputlb.h"
#include "exec/page-protection.h"
+#include "exec/target_page.h"
#include "gdbstub/helpers.h"
#include "qemu/host-utils.h"
#include "hw/loader.h"
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index b0841d44f4c..c13a117e3f9 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -26,6 +26,7 @@
#include "trace.h"
#include "exec/cputlb.h"
#include "exec/page-protection.h"
+#include "exec/target_page.h"
static bool pmp_write_cfg(CPURISCVState *env, uint32_t addr_index,
uint8_t val);
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 0ba0d55ab5b..948ee5023e6 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -23,6 +23,7 @@
#include "migration/vmstate.h"
#include "exec/cputlb.h"
#include "exec/page-protection.h"
+#include "exec/target_page.h"
#include "exec/translation-block.h"
#include "hw/loader.h"
#include "fpu/softfloat.h"
diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index e660c69f609..3c57c32e479 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -27,6 +27,7 @@
#include "target/s390x/kvm/pv.h"
#include "system/hw_accel.h"
#include "system/runstate.h"
+#include "exec/target_page.h"
#include "exec/watchpoint.h"
void s390x_tod_timer(void *opaque)
diff --git a/target/s390x/ioinst.c b/target/s390x/ioinst.c
index a944f16c254..8b0ab38277a 100644
--- a/target/s390x/ioinst.c
+++ b/target/s390x/ioinst.c
@@ -17,6 +17,7 @@
#include "trace.h"
#include "hw/s390x/s390-pci-bus.h"
#include "target/s390x/kvm/pv.h"
+#include "exec/target_page.h"
/* All I/O instructions but chsc use the s format */
static uint64_t get_address_from_regs(CPUS390XState *env, uint32_t ipb,
diff --git a/target/tricore/helper.c b/target/tricore/helper.c
index be3d97af78d..a5ae5bcb619 100644
--- a/target/tricore/helper.c
+++ b/target/tricore/helper.c
@@ -22,6 +22,7 @@
#include "exec/cputlb.h"
#include "exec/cpu-mmu-index.h"
#include "exec/page-protection.h"
+#include "exec/target_page.h"
#include "fpu/softfloat-helpers.h"
#include "qemu/qemu-print.h"
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index 4824b97e371..553e5ed271f 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -31,6 +31,7 @@
#include "exec/cputlb.h"
#include "gdbstub/helpers.h"
#include "exec/helper-proto.h"
+#include "exec/target_page.h"
#include "qemu/error-report.h"
#include "qemu/qemu-print.h"
#include "qemu/host-utils.h"
diff --git a/target/xtensa/xtensa-semi.c b/target/xtensa/xtensa-semi.c
index 2ded8e5634e..636f421da2b 100644
--- a/target/xtensa/xtensa-semi.c
+++ b/target/xtensa/xtensa-semi.c
@@ -29,6 +29,7 @@
#include "cpu.h"
#include "chardev/char-fe.h"
#include "exec/helper-proto.h"
+#include "exec/target_page.h"
#include "semihosting/semihost.h"
#include "semihosting/uaccess.h"
#include "qapi/error.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 10/29] exec/cpu-all: remove hw/core/cpu.h include
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (8 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 09/29] exec/cpu-all: remove exec/target_page include Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 11/29] accel/tcg: fix missing includes for TCG_GUEST_DEFAULT_MO Pierrick Bouvier
` (20 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index d4705210370..d4d05d82315 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -20,7 +20,6 @@
#define CPU_ALL_H
#include "exec/cpu-common.h"
-#include "hw/core/cpu.h"
#include "cpu.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 11/29] accel/tcg: fix missing includes for TCG_GUEST_DEFAULT_MO
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (9 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 10/29] exec/cpu-all: remove hw/core/cpu.h include Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 12/29] accel/tcg: fix missing includes for TARGET_HAS_PRECISE_SMC Pierrick Bouvier
` (19 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
We prepare to remove cpu.h from cpu-all.h, which will transitively
remove it from accel/tcg/tb-internal.h, and thus from most of tcg
compilation units.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
accel/tcg/internal-target.h | 1 +
include/exec/poison.h | 1 +
accel/tcg/translate-all.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h
index c88f007ffb7..05abaeb8e0e 100644
--- a/accel/tcg/internal-target.h
+++ b/accel/tcg/internal-target.h
@@ -9,6 +9,7 @@
#ifndef ACCEL_TCG_INTERNAL_TARGET_H
#define ACCEL_TCG_INTERNAL_TARGET_H
+#include "cpu-param.h"
#include "exec/exec-all.h"
#include "exec/translation-block.h"
#include "tb-internal.h"
diff --git a/include/exec/poison.h b/include/exec/poison.h
index 4180a5a4895..8ec02b40e84 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -37,6 +37,7 @@
#pragma GCC poison TARGET_NAME
#pragma GCC poison TARGET_SUPPORTS_MTTCG
#pragma GCC poison TARGET_BIG_ENDIAN
+#pragma GCC poison TCG_GUEST_DEFAULT_MO
#pragma GCC poison TARGET_LONG_BITS
#pragma GCC poison TARGET_FMT_lx
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index bb161ae61ad..8b8d9bb9a4a 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -43,6 +43,7 @@
#include "system/ram_addr.h"
#endif
+#include "cpu-param.h"
#include "exec/cputlb.h"
#include "exec/page-protection.h"
#include "exec/mmap-lock.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 12/29] accel/tcg: fix missing includes for TARGET_HAS_PRECISE_SMC
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (10 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 11/29] accel/tcg: fix missing includes for TCG_GUEST_DEFAULT_MO Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 13/29] exec/cpu-all: remove cpu include Pierrick Bouvier
` (18 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
We prepare to remove cpu.h from cpu-all.h, which will transitively
remove it from accel/tcg/tb-internal.h, and thus from most of tcg
compilation units.
Note: this was caught by a test regression for s390x-softmmu.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/poison.h | 1 +
accel/tcg/tb-maint.c | 1 +
accel/tcg/user-exec.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/include/exec/poison.h b/include/exec/poison.h
index 8ec02b40e84..f267da60838 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -38,6 +38,7 @@
#pragma GCC poison TARGET_SUPPORTS_MTTCG
#pragma GCC poison TARGET_BIG_ENDIAN
#pragma GCC poison TCG_GUEST_DEFAULT_MO
+#pragma GCC poison TARGET_HAS_PRECISE_SMC
#pragma GCC poison TARGET_LONG_BITS
#pragma GCC poison TARGET_FMT_lx
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index d5899ad0475..efe90d2d695 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "qemu/interval-tree.h"
#include "qemu/qtree.h"
+#include "cpu.h"
#include "exec/cputlb.h"
#include "exec/log.h"
#include "exec/exec-all.h"
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 667c5e03543..9d82d22bf40 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "accel/tcg/cpu-ops.h"
#include "disas/disas.h"
+#include "cpu.h"
#include "exec/vaddr.h"
#include "exec/exec-all.h"
#include "exec/tlb-flags.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 13/29] exec/cpu-all: remove cpu include
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (11 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 12/29] accel/tcg: fix missing includes for TARGET_HAS_PRECISE_SMC Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:58 ` [PATCH v3 14/29] exec/cpu-all: transfer exec/cpu-common include to cpu.h headers Pierrick Bouvier
` (17 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Now we made sure important defines are included using their direct
path, we can remove cpu.h from cpu-all.h.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/cpu-all.h | 2 --
accel/tcg/cpu-exec.c | 1 +
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index d4d05d82315..da8f5dd10c5 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -21,6 +21,4 @@
#include "exec/cpu-common.h"
-#include "cpu.h"
-
#endif /* CPU_ALL_H */
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 207416e0212..813113c51ea 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -36,6 +36,7 @@
#include "exec/log.h"
#include "qemu/main-loop.h"
#include "exec/cpu-all.h"
+#include "cpu.h"
#include "exec/icount.h"
#include "exec/replay-core.h"
#include "system/tcg.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 14/29] exec/cpu-all: transfer exec/cpu-common include to cpu.h headers
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (12 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 13/29] exec/cpu-all: remove cpu include Pierrick Bouvier
@ 2025-03-25 4:58 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 15/29] exec/cpu-all: remove this header Pierrick Bouvier
` (16 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:58 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/cpu-all.h | 2 --
include/exec/cpu_ldst.h | 1 +
target/alpha/cpu.h | 1 +
target/arm/cpu.h | 1 +
target/avr/cpu.h | 1 +
target/hexagon/cpu.h | 1 +
target/hppa/cpu.h | 1 +
target/i386/cpu.h | 1 +
target/loongarch/cpu.h | 1 +
target/m68k/cpu.h | 1 +
target/microblaze/cpu.h | 1 +
target/mips/cpu.h | 1 +
target/openrisc/cpu.h | 1 +
target/ppc/cpu.h | 1 +
target/riscv/cpu.h | 1 +
target/rx/cpu.h | 1 +
target/s390x/cpu.h | 1 +
target/sh4/cpu.h | 1 +
target/sparc/cpu.h | 1 +
target/tricore/cpu.h | 1 +
target/xtensa/cpu.h | 1 +
cpu-target.c | 1 +
22 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index da8f5dd10c5..b488e6b7c0b 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -19,6 +19,4 @@
#ifndef CPU_ALL_H
#define CPU_ALL_H
-#include "exec/cpu-common.h"
-
#endif /* CPU_ALL_H */
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index 82e67eff682..313100fcda1 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -66,6 +66,7 @@
#error Can only include this header with TCG
#endif
+#include "exec/cpu-common.h"
#include "exec/cpu-ldst-common.h"
#include "exec/cpu-mmu-index.h"
#include "exec/abi_ptr.h"
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 42788a6a0bc..fb1d63527ef 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -21,6 +21,7 @@
#define ALPHA_CPU_H
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 958a921490e..ee92476814c 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -24,6 +24,7 @@
#include "qemu/cpu-float.h"
#include "hw/registerfields.h"
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "exec/gdbstub.h"
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index 714c6821e2f..f56462912b9 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -22,6 +22,7 @@
#define QEMU_AVR_CPU_H
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index f78c8f9c2a0..e4fc35b112d 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -21,6 +21,7 @@
#include "fpu/softfloat-types.h"
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "hex_regs.h"
#include "mmvec/mmvec.h"
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 986dc655fc1..5b6cd2ae7fe 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -21,6 +21,7 @@
#define HPPA_CPU_H
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "system/memory.h"
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 64706bd6e5d..38ec99ee29c 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -23,6 +23,7 @@
#include "system/tcg.h"
#include "cpu-qom.h"
#include "kvm/hyperv-proto.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "exec/memop.h"
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 1dba8ac6a7c..167989ca7fe 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -9,6 +9,7 @@
#define LOONGARCH_CPU_H
#include "qemu/int128.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "fpu/softfloat-types.h"
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 451644a05a3..5347fbe3975 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -21,6 +21,7 @@
#ifndef M68K_CPU_H
#define M68K_CPU_H
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index d29681abed4..90d820b90c7 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -21,6 +21,7 @@
#define MICROBLAZE_CPU_H
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
#include "exec/cpu-interrupt.h"
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 29362498ec4..79f8041ced4 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -2,6 +2,7 @@
#define MIPS_CPU_H
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#ifndef CONFIG_USER_ONLY
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index c153823b629..f16a070ef6c 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -21,6 +21,7 @@
#define OPENRISC_CPU_H
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "fpu/softfloat-types.h"
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 7489ba95648..aa5df47bdaf 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -22,6 +22,7 @@
#include "qemu/int128.h"
#include "qemu/cpu-float.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "cpu-qom.h"
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 556eda57e94..14a6779b4c1 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -23,6 +23,7 @@
#include "hw/core/cpu.h"
#include "hw/registerfields.h"
#include "hw/qdev-properties.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "exec/gdbstub.h"
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index 5f2fcb66563..e2ec78835e4 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -23,6 +23,7 @@
#include "hw/registerfields.h"
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 0a32ad4c613..83d01d5c4e1 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -27,6 +27,7 @@
#include "cpu-qom.h"
#include "cpu_models.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 18557d8c386..7581f5eecb7 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -21,6 +21,7 @@
#define SH4_CPU_H
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 923836f47c8..5dc5dc49475 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -3,6 +3,7 @@
#include "qemu/bswap.h"
#include "cpu-qom.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "qemu/cpu-float.h"
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index cf9dbc6df8e..abb9cba136d 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -22,6 +22,7 @@
#include "cpu-qom.h"
#include "hw/registerfields.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
#include "tricore-defs.h"
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 66846314786..c5d2042de14 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -30,6 +30,7 @@
#include "cpu-qom.h"
#include "qemu/cpu-float.h"
+#include "exec/cpu-common.h"
#include "exec/cpu-defs.h"
#include "exec/cpu-interrupt.h"
#include "hw/clock.h"
diff --git a/cpu-target.c b/cpu-target.c
index 587f24b34e5..52de33d50b0 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -23,6 +23,7 @@
#include "qemu/qemu-print.h"
#include "system/accel-ops.h"
#include "system/cpus.h"
+#include "exec/cpu-common.h"
#include "exec/tswap.h"
#include "exec/replay-core.h"
#include "exec/log.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 15/29] exec/cpu-all: remove this header
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (13 preceding siblings ...)
2025-03-25 4:58 ` [PATCH v3 14/29] exec/cpu-all: transfer exec/cpu-common include to cpu.h headers Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 16/29] exec/target_page: runtime defintion for TARGET_PAGE_BITS_MIN Pierrick Bouvier
` (15 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
accel/tcg/tb-internal.h | 1 -
include/exec/cpu-all.h | 22 ----------------------
include/hw/core/cpu.h | 2 +-
include/qemu/bswap.h | 2 +-
target/alpha/cpu.h | 2 --
target/arm/cpu.h | 2 --
target/avr/cpu.h | 2 --
target/hexagon/cpu.h | 2 --
target/hppa/cpu.h | 2 --
target/i386/cpu.h | 1 -
target/loongarch/cpu.h | 2 --
target/m68k/cpu.h | 2 --
target/microblaze/cpu.h | 2 --
target/mips/cpu.h | 2 --
target/openrisc/cpu.h | 2 --
target/ppc/cpu.h | 2 --
target/riscv/cpu.h | 2 --
target/rx/cpu.h | 2 --
target/s390x/cpu.h | 2 --
target/sh4/cpu.h | 2 --
target/sparc/cpu.h | 2 --
target/tricore/cpu.h | 2 --
target/xtensa/cpu.h | 2 --
accel/tcg/cpu-exec.c | 1 -
semihosting/uaccess.c | 1 -
tcg/tcg-op-ldst.c | 2 +-
26 files changed, 3 insertions(+), 65 deletions(-)
delete mode 100644 include/exec/cpu-all.h
diff --git a/accel/tcg/tb-internal.h b/accel/tcg/tb-internal.h
index 68aa8d17f41..67e721585cf 100644
--- a/accel/tcg/tb-internal.h
+++ b/accel/tcg/tb-internal.h
@@ -9,7 +9,6 @@
#ifndef ACCEL_TCG_TB_INTERNAL_TARGET_H
#define ACCEL_TCG_TB_INTERNAL_TARGET_H
-#include "exec/cpu-all.h"
#include "exec/exec-all.h"
#include "exec/translation-block.h"
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
deleted file mode 100644
index b488e6b7c0b..00000000000
--- a/include/exec/cpu-all.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * defines common to all virtual CPUs
- *
- * Copyright (c) 2003 Fabrice Bellard
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef CPU_ALL_H
-#define CPU_ALL_H
-
-#endif /* CPU_ALL_H */
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 1c63266f072..76a9b2c37db 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -582,7 +582,7 @@ QEMU_BUILD_BUG_ON(offsetof(CPUState, neg) !=
static inline CPUArchState *cpu_env(CPUState *cpu)
{
- /* We validate that CPUArchState follows CPUState in cpu-all.h. */
+ /* We validate that CPUArchState follows CPUState in cpu-target.c */
return (CPUArchState *)(cpu + 1);
}
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index b915835bead..8782056ae48 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -206,7 +206,7 @@ CPU_CONVERT(le, 64, uint64_t)
* (except for byte accesses, which have no endian infix).
*
* The target endian accessors are obviously only available to source
- * files which are built per-target; they are defined in cpu-all.h.
+ * files which are built per-target; they are defined in system/memory.h.
*
* In all cases these functions take a host pointer.
* For accessors that take a guest address rather than a
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index fb1d63527ef..849f6734894 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -289,8 +289,6 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags);
int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-#include "exec/cpu-all.h"
-
enum {
FEATURE_ASN = 0x00000001,
FEATURE_SPS = 0x00000002,
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ee92476814c..ea9956395ca 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2968,8 +2968,6 @@ static inline bool arm_sctlr_b(CPUARMState *env)
uint64_t arm_sctlr(CPUARMState *env, int el);
-#include "exec/cpu-all.h"
-
/*
* We have more than 32-bits worth of state per TB, so we split the data
* between tb->flags and tb->cs_base, which is otherwise unused for ARM.
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index f56462912b9..b12059ee089 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -246,6 +246,4 @@ bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
-#include "exec/cpu-all.h"
-
#endif /* QEMU_AVR_CPU_H */
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index e4fc35b112d..c065fa8ddcf 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -158,6 +158,4 @@ void hexagon_translate_init(void);
void hexagon_translate_code(CPUState *cs, TranslationBlock *tb,
int *max_insns, vaddr pc, void *host_pc);
-#include "exec/cpu-all.h"
-
#endif /* HEXAGON_CPU_H */
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 5b6cd2ae7fe..2269d1c1064 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -306,8 +306,6 @@ struct HPPACPUClass {
ResettablePhases parent_phases;
};
-#include "exec/cpu-all.h"
-
static inline bool hppa_is_pa20(const CPUHPPAState *env)
{
return env->is_pa20;
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 38ec99ee29c..049bdd1a893 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2607,7 +2607,6 @@ int cpu_mmu_index_kernel(CPUX86State *env);
#define CC_SRC2 (env->cc_src2)
#define CC_OP (env->cc_op)
-#include "exec/cpu-all.h"
#include "svm.h"
#if !defined(CONFIG_USER_ONLY)
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 167989ca7fe..a7d6c809cf4 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -503,8 +503,6 @@ static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
*flags |= is_va32(env) * HW_FLAGS_VA32;
}
-#include "exec/cpu-all.h"
-
#define CPU_RESOLVING_TYPE TYPE_LOONGARCH_CPU
void loongarch_cpu_post_init(Object *obj);
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 5347fbe3975..0b70e8c6ab6 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -596,8 +596,6 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
MemTxResult response, uintptr_t retaddr);
#endif
-#include "exec/cpu-all.h"
-
/* TB flags */
#define TB_FLAGS_MACSR 0x0f
#define TB_FLAGS_MSR_S_BIT 13
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 90d820b90c7..2bfa396c96d 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -411,8 +411,6 @@ void mb_translate_code(CPUState *cs, TranslationBlock *tb,
#define MMU_USER_IDX 2
/* See NB_MMU_MODES in cpu-defs.h. */
-#include "exec/cpu-all.h"
-
/* Ensure there is no overlap between the two masks. */
QEMU_BUILD_BUG_ON(MSR_TB_MASK & IFLAGS_TB_MASK);
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 79f8041ced4..20f31370bcb 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1258,8 +1258,6 @@ static inline int mips_env_mmu_index(CPUMIPSState *env)
return hflags_mmu_index(env->hflags);
}
-#include "exec/cpu-all.h"
-
/* Exceptions */
enum {
EXCP_NONE = -1,
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index f16a070ef6c..19ee85ff5a0 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -334,8 +334,6 @@ void cpu_openrisc_count_stop(OpenRISCCPU *cpu);
#define CPU_RESOLVING_TYPE TYPE_OPENRISC_CPU
-#include "exec/cpu-all.h"
-
#define TB_FLAGS_SM SR_SM
#define TB_FLAGS_DME SR_DME
#define TB_FLAGS_IME SR_IME
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index aa5df47bdaf..3c02f7f7d45 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1704,8 +1704,6 @@ void ppc_compat_add_property(Object *obj, const char *name,
uint32_t *compat_pvr, const char *basedesc);
#endif /* defined(TARGET_PPC64) */
-#include "exec/cpu-all.h"
-
/*****************************************************************************/
/* CRF definitions */
#define CRF_LT_BIT 3
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 14a6779b4c1..867e539b53a 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -634,8 +634,6 @@ G_NORETURN void riscv_raise_exception(CPURISCVState *env,
target_ulong riscv_cpu_get_fflags(CPURISCVState *env);
void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong);
-#include "exec/cpu-all.h"
-
FIELD(TB_FLAGS, MEM_IDX, 0, 3)
FIELD(TB_FLAGS, FS, 3, 2)
/* Vector flags */
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index e2ec78835e4..5c19c832194 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -147,8 +147,6 @@ void rx_translate_code(CPUState *cs, TranslationBlock *tb,
int *max_insns, vaddr pc, void *host_pc);
void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte);
-#include "exec/cpu-all.h"
-
#define CPU_INTERRUPT_SOFT CPU_INTERRUPT_TGT_INT_0
#define CPU_INTERRUPT_FIR CPU_INTERRUPT_TGT_INT_1
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 83d01d5c4e1..940eda8dd12 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -948,6 +948,4 @@ uint64_t s390_cpu_get_psw_mask(CPUS390XState *env);
/* outside of target/s390x/ */
S390CPU *s390_cpu_addr2state(uint16_t cpu_addr);
-#include "exec/cpu-all.h"
-
#endif
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 7581f5eecb7..7752a0c2e1a 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -288,8 +288,6 @@ void cpu_load_tlb(CPUSH4State * env);
/* MMU modes definitions */
#define MMU_USER_IDX 1
-#include "exec/cpu-all.h"
-
/* MMU control register */
#define MMUCR 0x1F000010
#define MMUCR_AT (1<<0)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 5dc5dc49475..71e112d8474 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -729,8 +729,6 @@ static inline int cpu_pil_allowed(CPUSPARCState *env1, int pil)
#endif
}
-#include "exec/cpu-all.h"
-
#ifdef TARGET_SPARC64
/* sun4u.c */
void cpu_tick_set_count(CPUTimer *timer, uint64_t count);
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index abb9cba136d..c76e65f8185 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -251,8 +251,6 @@ void fpu_set_state(CPUTriCoreState *env);
#define MMU_USER_IDX 2
-#include "exec/cpu-all.h"
-
FIELD(TB_FLAGS, PRIV, 0, 2)
void cpu_state_reset(CPUTriCoreState *s);
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index c5d2042de14..c03ed71c945 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -733,8 +733,6 @@ static inline uint32_t xtensa_replicate_windowstart(CPUXtensaState *env)
#define XTENSA_CSBASE_LBEG_OFF_MASK 0x00ff0000
#define XTENSA_CSBASE_LBEG_OFF_SHIFT 16
-#include "exec/cpu-all.h"
-
static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, vaddr *pc,
uint64_t *cs_base, uint32_t *flags)
{
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 813113c51ea..6c6098955f0 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -35,7 +35,6 @@
#include "qemu/rcu.h"
#include "exec/log.h"
#include "qemu/main-loop.h"
-#include "exec/cpu-all.h"
#include "cpu.h"
#include "exec/icount.h"
#include "exec/replay-core.h"
diff --git a/semihosting/uaccess.c b/semihosting/uaccess.c
index cb64725a37c..c4c4c7a8d03 100644
--- a/semihosting/uaccess.c
+++ b/semihosting/uaccess.c
@@ -8,7 +8,6 @@
*/
#include "qemu/osdep.h"
-#include "exec/cpu-all.h"
#include "exec/cpu-mmu-index.h"
#include "exec/exec-all.h"
#include "exec/tlb-flags.h"
diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c
index 73838e27015..3b073b4ce0c 100644
--- a/tcg/tcg-op-ldst.c
+++ b/tcg/tcg-op-ldst.c
@@ -37,7 +37,7 @@ static void check_max_alignment(unsigned a_bits)
{
/*
* The requested alignment cannot overlap the TLB flags.
- * FIXME: Must keep the count up-to-date with "exec/cpu-all.h".
+ * FIXME: Must keep the count up-to-date with "exec/tlb-flags.h".
*/
if (tcg_use_softmmu) {
tcg_debug_assert(a_bits + 5 <= tcg_ctx->page_bits);
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 16/29] exec/target_page: runtime defintion for TARGET_PAGE_BITS_MIN
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (14 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 15/29] exec/cpu-all: remove this header Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 17/29] accel/kvm: move KVM_HAVE_MCE_INJECTION define to kvm-all.c Pierrick Bouvier
` (14 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
We introduce later a mechanism to skip cpu definitions inclusion, so we
can detect it here, and call the correct runtime function instead.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/target_page.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/exec/target_page.h b/include/exec/target_page.h
index 8e89e5cbe6f..aeddb25c743 100644
--- a/include/exec/target_page.h
+++ b/include/exec/target_page.h
@@ -40,6 +40,9 @@ extern const TargetPageBits target_page;
# define TARGET_PAGE_MASK ((TARGET_PAGE_TYPE)target_page.mask)
# endif
# define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK)
+# ifndef TARGET_PAGE_BITS_MIN
+# define TARGET_PAGE_BITS_MIN qemu_target_page_bits_min()
+# endif
#else
# define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS
# define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 17/29] accel/kvm: move KVM_HAVE_MCE_INJECTION define to kvm-all.c
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (15 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 16/29] exec/target_page: runtime defintion for TARGET_PAGE_BITS_MIN Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 18/29] exec/poison: KVM_HAVE_MCE_INJECTION can now be poisoned Pierrick Bouvier
` (13 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
This define is used only in accel/kvm/kvm-all.c, so we push directly the
definition there. Add more visibility to kvm_arch_on_sigbus_vcpu() to
allow removing this define from any header.
The architectures defining KVM_HAVE_MCE_INJECTION are i386, x86_64 and
aarch64.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/system/kvm.h | 2 --
target/arm/cpu.h | 4 ----
target/i386/cpu.h | 2 --
accel/kvm/kvm-all.c | 5 +++++
4 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/include/system/kvm.h b/include/system/kvm.h
index 716c7dcdf6b..b690dda1370 100644
--- a/include/system/kvm.h
+++ b/include/system/kvm.h
@@ -392,9 +392,7 @@ bool kvm_vcpu_id_is_valid(int vcpu_id);
/* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */
unsigned long kvm_arch_vcpu_id(CPUState *cpu);
-#ifdef KVM_HAVE_MCE_INJECTION
void kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr);
-#endif
void kvm_arch_init_irq_routing(KVMState *s);
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ea9956395ca..a8a1a8faf6b 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -33,10 +33,6 @@
#include "target/arm/multiprocessing.h"
#include "target/arm/gtimer.h"
-#ifdef TARGET_AARCH64
-#define KVM_HAVE_MCE_INJECTION 1
-#endif
-
#define EXCP_UDEF 1 /* undefined instruction */
#define EXCP_SWI 2 /* software interrupt */
#define EXCP_PREFETCH_ABORT 3
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 049bdd1a893..44ee263d8f1 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -35,8 +35,6 @@
#define XEN_NR_VIRQS 24
-#define KVM_HAVE_MCE_INJECTION 1
-
/* support for self modifying code even if the modified instruction is
close to the modifying instruction */
#define TARGET_HAS_PRECISE_SMC
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 0723a3933bb..7c5d1a98bc4 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -57,6 +57,11 @@
#include <sys/eventfd.h>
#endif
+#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
+# define KVM_HAVE_MCE_INJECTION 1
+#endif
+
+
/* KVM uses PAGE_SIZE in its definition of KVM_COALESCED_MMIO_MAX. We
* need to use the real host PAGE_SIZE, as that's what KVM will use.
*/
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 18/29] exec/poison: KVM_HAVE_MCE_INJECTION can now be poisoned
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (16 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 17/29] accel/kvm: move KVM_HAVE_MCE_INJECTION define to kvm-all.c Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 19/29] target/arm/cpu: always define kvm related registers Pierrick Bouvier
` (12 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
We prevent common code to use this define by mistake.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
include/exec/poison.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/exec/poison.h b/include/exec/poison.h
index f267da60838..a09e0c12631 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -73,4 +73,6 @@
#pragma GCC poison CONFIG_SOFTMMU
#endif
+#pragma GCC poison KVM_HAVE_MCE_INJECTION
+
#endif
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 19/29] target/arm/cpu: always define kvm related registers
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (17 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 18/29] exec/poison: KVM_HAVE_MCE_INJECTION can now be poisoned Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 20/29] target/arm/cpu: flags2 is always uint64_t Pierrick Bouvier
` (11 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
This does not hurt, even if they are not used.
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
target/arm/cpu.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index a8a1a8faf6b..ab7412772bc 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -971,7 +971,6 @@ struct ArchCPU {
*/
uint32_t kvm_target;
-#ifdef CONFIG_KVM
/* KVM init features for this CPU */
uint32_t kvm_init_features[7];
@@ -984,7 +983,6 @@ struct ArchCPU {
/* KVM steal time */
OnOffAuto kvm_steal_time;
-#endif /* CONFIG_KVM */
/* Uniprocessor system with MP extensions */
bool mp_is_up;
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 20/29] target/arm/cpu: flags2 is always uint64_t
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (18 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 19/29] target/arm/cpu: always define kvm related registers Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 21/29] target/arm/cpu: define same set of registers for aarch32 and aarch64 Pierrick Bouvier
` (10 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Do not rely on target dependent type, but use a fixed type instead.
Since the original type is unsigned, it should be safe to extend its
size without any side effect.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
target/arm/cpu.h | 10 ++++------
target/arm/tcg/hflags.c | 4 ++--
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ab7412772bc..cc975175c61 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -194,7 +194,7 @@ typedef struct ARMPACKey {
/* See the commentary above the TBFLAG field definitions. */
typedef struct CPUARMTBFlags {
uint32_t flags;
- target_ulong flags2;
+ uint64_t flags2;
} CPUARMTBFlags;
typedef struct ARMMMUFaultInfo ARMMMUFaultInfo;
@@ -2968,11 +2968,9 @@ uint64_t arm_sctlr(CPUARMState *env, int el);
* We collect these two parts in CPUARMTBFlags where they are named
* flags and flags2 respectively.
*
- * The flags that are shared between all execution modes, TBFLAG_ANY,
- * are stored in flags. The flags that are specific to a given mode
- * are stores in flags2. Since cs_base is sized on the configured
- * address size, flags2 always has 64-bits for A64, and a minimum of
- * 32-bits for A32 and M32.
+ * The flags that are shared between all execution modes, TBFLAG_ANY, are stored
+ * in flags. The flags that are specific to a given mode are stored in flags2.
+ * flags2 always has 64-bits, even though only 32-bits are used for A32 and M32.
*
* The bits for 32-bit A-profile and M-profile partially overlap:
*
diff --git a/target/arm/tcg/hflags.c b/target/arm/tcg/hflags.c
index 8d79b8b7ae1..e51d9f7b159 100644
--- a/target/arm/tcg/hflags.c
+++ b/target/arm/tcg/hflags.c
@@ -506,8 +506,8 @@ void assert_hflags_rebuild_correctly(CPUARMState *env)
if (unlikely(c.flags != r.flags || c.flags2 != r.flags2)) {
fprintf(stderr, "TCG hflags mismatch "
- "(current:(0x%08x,0x" TARGET_FMT_lx ")"
- " rebuilt:(0x%08x,0x" TARGET_FMT_lx ")\n",
+ "(current:(0x%08x,0x%016" PRIx64 ")"
+ " rebuilt:(0x%08x,0x%016" PRIx64 ")\n",
c.flags, c.flags2, r.flags, r.flags2);
abort();
}
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 21/29] target/arm/cpu: define same set of registers for aarch32 and aarch64
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (19 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 20/29] target/arm/cpu: flags2 is always uint64_t Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 22/29] target/arm/cpu: remove inline stubs for aarch32 emulation Pierrick Bouvier
` (9 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
To eliminate TARGET_AARCH64, we need to make various definitions common
between 32 and 64 bit Arm targets.
Added registers are used only by aarch64 code, and the only impact is on
the size of CPUARMState, and added zarray
(ARMVectorReg zarray[ARM_MAX_VQ * 16]) member (+64KB)
It could be eventually possible to allocate this array only for aarch64
emulation, but I'm not sure it's worth the hassle to save a few KB per
vcpu. Running qemu-system takes already several hundreds of MB of
(resident) memory, and qemu-user takes dozens of MB of (resident) memory
anyway.
As part of this, we define ARM_MAX_VQ once for aarch32 and aarch64,
which will affect zregs field for aarch32.
This field is used for MVE and SVE implementations. MVE implementation
is clipping index value to 0 or 1 for zregs[*].d[],
so we should not touch the rest of data in this case anyway.
This change is safe regarding migration, because aarch64 registers still
have the same size, and for aarch32, only zregs is modified.
Migration code explicitly specify a size of 2 for env.vfp.zregs[0].d,
VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[0].d, ARMCPU, 0, 2). So extending
the storage size has no impact.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
target/arm/cpu.h | 12 +-----------
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index cc975175c61..b1c3e463267 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -169,17 +169,12 @@ typedef struct ARMGenericTimer {
* Align the data for use with TCG host vector operations.
*/
-#ifdef TARGET_AARCH64
-# define ARM_MAX_VQ 16
-#else
-# define ARM_MAX_VQ 1
-#endif
+#define ARM_MAX_VQ 16
typedef struct ARMVectorReg {
uint64_t d[2 * ARM_MAX_VQ] QEMU_ALIGNED(16);
} ARMVectorReg;
-#ifdef TARGET_AARCH64
/* In AArch32 mode, predicate registers do not exist at all. */
typedef struct ARMPredicateReg {
uint64_t p[DIV_ROUND_UP(2 * ARM_MAX_VQ, 8)] QEMU_ALIGNED(16);
@@ -189,7 +184,6 @@ typedef struct ARMPredicateReg {
typedef struct ARMPACKey {
uint64_t lo, hi;
} ARMPACKey;
-#endif
/* See the commentary above the TBFLAG field definitions. */
typedef struct CPUARMTBFlags {
@@ -660,13 +654,11 @@ typedef struct CPUArchState {
struct {
ARMVectorReg zregs[32];
-#ifdef TARGET_AARCH64
/* Store FFR as pregs[16] to make it easier to treat as any other. */
#define FFR_PRED_NUM 16
ARMPredicateReg pregs[17];
/* Scratch space for aa64 sve predicate temporary. */
ARMPredicateReg preg_tmp;
-#endif
/* We store these fpcsr fields separately for convenience. */
uint32_t qc[4] QEMU_ALIGNED(16);
@@ -711,7 +703,6 @@ typedef struct CPUArchState {
uint32_t cregs[16];
} iwmmxt;
-#ifdef TARGET_AARCH64
struct {
ARMPACKey apia;
ARMPACKey apib;
@@ -743,7 +734,6 @@ typedef struct CPUArchState {
* to keep the offsets into the rest of the structure smaller.
*/
ARMVectorReg zarray[ARM_MAX_VQ * 16];
-#endif
struct CPUBreakpoint *cpu_breakpoint[16];
struct CPUWatchpoint *cpu_watchpoint[16];
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 22/29] target/arm/cpu: remove inline stubs for aarch32 emulation
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (20 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 21/29] target/arm/cpu: define same set of registers for aarch32 and aarch64 Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 23/29] meson: add common hw files Pierrick Bouvier
` (8 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Directly condition associated calls in target/arm/helper.c for now.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
target/arm/cpu.h | 8 --------
target/arm/helper.c | 6 ++++++
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index b1c3e463267..c1a0faed3ad 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1222,7 +1222,6 @@ int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
*/
void arm_emulate_firmware_reset(CPUState *cpustate, int target_el);
-#ifdef TARGET_AARCH64
int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
@@ -1254,13 +1253,6 @@ static inline uint64_t *sve_bswap64(uint64_t *dst, uint64_t *src, int nr)
#endif
}
-#else
-static inline void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq) { }
-static inline void aarch64_sve_change_el(CPUARMState *env, int o,
- int n, bool a)
-{ }
-#endif
-
void aarch64_sync_32_to_64(CPUARMState *env);
void aarch64_sync_64_to_32(CPUARMState *env);
diff --git a/target/arm/helper.c b/target/arm/helper.c
index fa23e309040..73e98532c03 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6564,7 +6564,9 @@ static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
*/
new_len = sve_vqm1_for_el(env, cur_el);
if (new_len < old_len) {
+#ifdef TARGET_AARCH64
aarch64_sve_narrow_vq(env, new_len + 1);
+#endif
}
}
@@ -10648,7 +10650,9 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
* Note that new_el can never be 0. If cur_el is 0, then
* el0_a64 is is_a64(), else el0_a64 is ignored.
*/
+#ifdef TARGET_AARCH64
aarch64_sve_change_el(env, cur_el, new_el, is_a64(env));
+#endif
}
if (cur_el < new_el) {
@@ -11665,7 +11669,9 @@ void aarch64_sve_change_el(CPUARMState *env, int old_el,
/* When changing vector length, clear inaccessible state. */
if (new_len < old_len) {
+#ifdef TARGET_AARCH64
aarch64_sve_narrow_vq(env, new_len + 1);
+#endif
}
}
#endif
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 23/29] meson: add common hw files
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (21 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 22/29] target/arm/cpu: remove inline stubs for aarch32 emulation Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 24/29] hw/arm/boot: make compilation unit hw common Pierrick Bouvier
` (7 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Those files will be compiled once per base architecture ("arm" in this
case), instead of being compiled for every variant/bitness of
architecture.
We make sure to not include target cpu definitions (exec/cpu-defs.h) by
defining header guard directly. This way, a given compilation unit can
access a specific cpu definition, but not access to compile time defines
associated.
Previous commits took care to clean up some headers to not rely on
cpu-defs.h content.
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
meson.build | 37 ++++++++++++++++++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/meson.build b/meson.build
index c21974020dd..994d3e5d536 100644
--- a/meson.build
+++ b/meson.build
@@ -3691,6 +3691,7 @@ hw_arch = {}
target_arch = {}
target_system_arch = {}
target_user_arch = {}
+hw_common_arch = {}
# NOTE: the trace/ subdirectory needs the qapi_trace_events variable
# that is filled in by qapi/.
@@ -4089,6 +4090,34 @@ common_all = static_library('common',
implicit_include_directories: false,
dependencies: common_ss.all_dependencies())
+# construct common libraries per base architecture
+hw_common_arch_libs = {}
+foreach target : target_dirs
+ config_target = config_target_mak[target]
+ target_base_arch = config_target['TARGET_BASE_ARCH']
+
+ # check if already generated
+ if target_base_arch in hw_common_arch_libs
+ continue
+ endif
+
+ if target_base_arch in hw_common_arch
+ target_inc = [include_directories('target' / target_base_arch)]
+ src = hw_common_arch[target_base_arch]
+ lib = static_library(
+ 'hw_' + target_base_arch,
+ build_by_default: false,
+ sources: src.all_sources() + genh,
+ include_directories: common_user_inc + target_inc,
+ implicit_include_directories: false,
+ # prevent common code to access cpu compile time
+ # definition, but still allow access to cpu.h
+ c_args: ['-DCPU_DEFS_H', '-DCOMPILING_SYSTEM_VS_USER', '-DCONFIG_SOFTMMU'],
+ dependencies: src.all_dependencies())
+ hw_common_arch_libs += {target_base_arch: lib}
+ endif
+endforeach
+
if have_rust
# We would like to use --generate-cstr, but it is only available
# starting with bindgen 0.66.0. The oldest supported versions
@@ -4254,8 +4283,14 @@ foreach target : target_dirs
arch_deps += t.dependencies()
target_common = common_ss.apply(config_target, strict: false)
- objects = common_all.extract_objects(target_common.sources())
+ objects = [common_all.extract_objects(target_common.sources())]
arch_deps += target_common.dependencies()
+ if target_type == 'system' and target_base_arch in hw_common_arch_libs
+ src = hw_common_arch[target_base_arch].apply(config_target, strict: false)
+ lib = hw_common_arch_libs[target_base_arch]
+ objects += lib.extract_objects(src.sources())
+ arch_deps += src.dependencies()
+ endif
target_specific = specific_ss.apply(config_target, strict: false)
arch_srcs += target_specific.sources()
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 24/29] hw/arm/boot: make compilation unit hw common
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (22 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 23/29] meson: add common hw files Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 25/29] hw/arm/armv7m: prepare compilation unit to be common Pierrick Bouvier
` (6 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Now we eliminated poisoned identifiers from headers, this file can now
be compiled once for all arm targets.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
hw/arm/boot.c | 1 +
hw/arm/meson.build | 5 ++++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index d3811b896fd..f94b940bc31 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -14,6 +14,7 @@
#include <libfdt.h>
#include "hw/arm/boot.h"
#include "hw/arm/linux-boot-if.h"
+#include "cpu.h"
#include "exec/target_page.h"
#include "system/kvm.h"
#include "system/tcg.h"
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index ac473ce7cda..9e8c96059eb 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -1,5 +1,5 @@
arm_ss = ss.source_set()
-arm_ss.add(files('boot.c'))
+arm_common_ss = ss.source_set()
arm_ss.add(when: 'CONFIG_ARM_VIRT', if_true: files('virt.c'))
arm_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c'))
arm_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic_boards.c'))
@@ -75,4 +75,7 @@ system_ss.add(when: 'CONFIG_SX1', if_true: files('omap_sx1.c'))
system_ss.add(when: 'CONFIG_VERSATILE', if_true: files('versatilepb.c'))
system_ss.add(when: 'CONFIG_VEXPRESS', if_true: files('vexpress.c'))
+arm_common_ss.add(fdt, files('boot.c'))
+
hw_arch += {'arm': arm_ss}
+hw_common_arch += {'arm': arm_common_ss}
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 25/29] hw/arm/armv7m: prepare compilation unit to be common
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (23 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 24/29] hw/arm/boot: make compilation unit hw common Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 26/29] hw/arm/digic_boards: " Pierrick Bouvier
` (5 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
hw/arm/armv7m.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 98a69846119..854498ac51c 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -140,7 +140,7 @@ static MemTxResult v7m_sysreg_ns_write(void *opaque, hwaddr addr,
/* S accesses to the alias act like NS accesses to the real region */
attrs.secure = 0;
return memory_region_dispatch_write(mr, addr, value,
- size_memop(size) | MO_TE, attrs);
+ size_memop(size) | MO_LE, attrs);
} else {
/* NS attrs are RAZ/WI for privileged, and BusFault for user */
if (attrs.user) {
@@ -160,7 +160,7 @@ static MemTxResult v7m_sysreg_ns_read(void *opaque, hwaddr addr,
/* S accesses to the alias act like NS accesses to the real region */
attrs.secure = 0;
return memory_region_dispatch_read(mr, addr, data,
- size_memop(size) | MO_TE, attrs);
+ size_memop(size) | MO_LE, attrs);
} else {
/* NS attrs are RAZ/WI for privileged, and BusFault for user */
if (attrs.user) {
@@ -187,7 +187,7 @@ static MemTxResult v7m_systick_write(void *opaque, hwaddr addr,
/* Direct the access to the correct systick */
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]), 0);
return memory_region_dispatch_write(mr, addr, value,
- size_memop(size) | MO_TE, attrs);
+ size_memop(size) | MO_LE, attrs);
}
static MemTxResult v7m_systick_read(void *opaque, hwaddr addr,
@@ -199,7 +199,7 @@ static MemTxResult v7m_systick_read(void *opaque, hwaddr addr,
/* Direct the access to the correct systick */
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]), 0);
- return memory_region_dispatch_read(mr, addr, data, size_memop(size) | MO_TE,
+ return memory_region_dispatch_read(mr, addr, data, size_memop(size) | MO_LE,
attrs);
}
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 26/29] hw/arm/digic_boards: prepare compilation unit to be common
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (24 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 25/29] hw/arm/armv7m: prepare compilation unit to be common Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 27/29] hw/arm/xlnx-zynqmp: " Pierrick Bouvier
` (4 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
hw/arm/digic_boards.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 2492fafeb85..466b8b84c0e 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -80,7 +80,7 @@ static void digic4_board_init(MachineState *machine, DigicBoard *board)
static void digic_load_rom(DigicState *s, hwaddr addr,
hwaddr max_size, const char *filename)
{
- target_long rom_size;
+ ssize_t rom_size;
if (qtest_enabled()) {
/* qtest runs no code so don't attempt a ROM load which
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 27/29] hw/arm/xlnx-zynqmp: prepare compilation unit to be common
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (25 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 26/29] hw/arm/digic_boards: " Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 28/29] hw/arm/xlnx-versal: " Pierrick Bouvier
` (3 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Remove kvm unused headers.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
hw/arm/xlnx-zynqmp.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index d6022ff2d3d..ec2b3a41eda 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -22,9 +22,7 @@
#include "hw/intc/arm_gic_common.h"
#include "hw/misc/unimp.h"
#include "hw/boards.h"
-#include "system/kvm.h"
#include "system/system.h"
-#include "kvm_arm.h"
#include "target/arm/cpu-qom.h"
#include "target/arm/gtimer.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 28/29] hw/arm/xlnx-versal: prepare compilation unit to be common
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (26 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 27/29] hw/arm/xlnx-zynqmp: " Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 4:59 ` [PATCH v3 29/29] hw/arm: make most of the compilation units common Pierrick Bouvier
` (2 subsequent siblings)
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Remove kvm unused headers.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
hw/arm/xlnx-versal.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index 278545a3f7b..f0b383b29ee 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -17,9 +17,7 @@
#include "hw/sysbus.h"
#include "net/net.h"
#include "system/system.h"
-#include "system/kvm.h"
#include "hw/arm/boot.h"
-#include "kvm_arm.h"
#include "hw/misc/unimp.h"
#include "hw/arm/xlnx-versal.h"
#include "qemu/log.h"
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH v3 29/29] hw/arm: make most of the compilation units common
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (27 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 28/29] hw/arm/xlnx-versal: " Pierrick Bouvier
@ 2025-03-25 4:59 ` Pierrick Bouvier
2025-03-25 5:02 ` [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
2025-03-31 22:38 ` Richard Henderson
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 4:59 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée,
Pierrick Bouvier
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
hw/arm/meson.build | 112 ++++++++++++++++++++++-----------------------
1 file changed, 56 insertions(+), 56 deletions(-)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 9e8c96059eb..09b1cfe5b57 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -2,43 +2,43 @@ arm_ss = ss.source_set()
arm_common_ss = ss.source_set()
arm_ss.add(when: 'CONFIG_ARM_VIRT', if_true: files('virt.c'))
arm_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c'))
-arm_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic_boards.c'))
-arm_ss.add(when: 'CONFIG_EMCRAFT_SF2', if_true: files('msf2-som.c'))
-arm_ss.add(when: 'CONFIG_HIGHBANK', if_true: files('highbank.c'))
-arm_ss.add(when: 'CONFIG_INTEGRATOR', if_true: files('integratorcp.c'))
-arm_ss.add(when: 'CONFIG_MICROBIT', if_true: files('microbit.c'))
-arm_ss.add(when: 'CONFIG_MPS3R', if_true: files('mps3r.c'))
-arm_ss.add(when: 'CONFIG_MUSICPAL', if_true: files('musicpal.c'))
-arm_ss.add(when: 'CONFIG_NETDUINOPLUS2', if_true: files('netduinoplus2.c'))
-arm_ss.add(when: 'CONFIG_OLIMEX_STM32_H405', if_true: files('olimex-stm32-h405.c'))
-arm_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx.c', 'npcm7xx_boards.c'))
-arm_ss.add(when: 'CONFIG_NPCM8XX', if_true: files('npcm8xx.c', 'npcm8xx_boards.c'))
-arm_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview.c'))
+arm_common_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic_boards.c'))
+arm_common_ss.add(when: 'CONFIG_EMCRAFT_SF2', if_true: files('msf2-som.c'))
+arm_common_ss.add(when: 'CONFIG_HIGHBANK', if_true: files('highbank.c'))
+arm_common_ss.add(when: 'CONFIG_INTEGRATOR', if_true: files('integratorcp.c'))
+arm_common_ss.add(when: 'CONFIG_MICROBIT', if_true: files('microbit.c'))
+arm_common_ss.add(when: 'CONFIG_MPS3R', if_true: files('mps3r.c'))
+arm_common_ss.add(when: 'CONFIG_MUSICPAL', if_true: [pixman, files('musicpal.c')])
+arm_common_ss.add(when: 'CONFIG_NETDUINOPLUS2', if_true: files('netduinoplus2.c'))
+arm_common_ss.add(when: 'CONFIG_OLIMEX_STM32_H405', if_true: files('olimex-stm32-h405.c'))
+arm_common_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx.c', 'npcm7xx_boards.c'))
+arm_common_ss.add(when: 'CONFIG_NPCM8XX', if_true: files('npcm8xx.c', 'npcm8xx_boards.c'))
+arm_common_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview.c'))
arm_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa-ref.c'))
-arm_ss.add(when: 'CONFIG_STELLARIS', if_true: files('stellaris.c'))
-arm_ss.add(when: 'CONFIG_STM32VLDISCOVERY', if_true: files('stm32vldiscovery.c'))
-arm_ss.add(when: 'CONFIG_ZYNQ', if_true: files('xilinx_zynq.c'))
-arm_ss.add(when: 'CONFIG_SABRELITE', if_true: files('sabrelite.c'))
+arm_common_ss.add(when: 'CONFIG_STELLARIS', if_true: files('stellaris.c'))
+arm_common_ss.add(when: 'CONFIG_STM32VLDISCOVERY', if_true: files('stm32vldiscovery.c'))
+arm_common_ss.add(when: 'CONFIG_ZYNQ', if_true: files('xilinx_zynq.c'))
+arm_common_ss.add(when: 'CONFIG_SABRELITE', if_true: files('sabrelite.c'))
-arm_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m.c'))
-arm_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210.c'))
-arm_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic.c'))
-arm_ss.add(when: 'CONFIG_OMAP', if_true: files('omap1.c'))
-arm_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('allwinner-a10.c', 'cubieboard.c'))
-arm_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3.c', 'orangepi.c'))
-arm_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40.c', 'bananapi_m2u.c'))
+arm_common_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m.c'))
+arm_common_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210.c'))
+arm_common_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic.c'))
+arm_common_ss.add(when: 'CONFIG_OMAP', if_true: files('omap1.c'))
+arm_common_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('allwinner-a10.c', 'cubieboard.c'))
+arm_common_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3.c', 'orangepi.c'))
+arm_common_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40.c', 'bananapi_m2u.c'))
arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2836.c', 'raspi.c'))
-arm_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files('bcm2838.c', 'raspi4b.c'))
-arm_ss.add(when: 'CONFIG_STM32F100_SOC', if_true: files('stm32f100_soc.c'))
-arm_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c'))
-arm_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c'))
-arm_ss.add(when: 'CONFIG_B_L475E_IOT01A', if_true: files('b-l475e-iot01a.c'))
-arm_ss.add(when: 'CONFIG_STM32L4X5_SOC', if_true: files('stm32l4x5_soc.c'))
-arm_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c'))
-arm_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal.c', 'xlnx-versal-virt.c'))
-arm_ss.add(when: 'CONFIG_FSL_IMX25', if_true: files('fsl-imx25.c', 'imx25_pdk.c'))
-arm_ss.add(when: 'CONFIG_FSL_IMX31', if_true: files('fsl-imx31.c', 'kzm.c'))
-arm_ss.add(when: 'CONFIG_FSL_IMX6', if_true: files('fsl-imx6.c'))
+arm_common_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files('bcm2838.c', 'raspi4b.c'))
+arm_common_ss.add(when: 'CONFIG_STM32F100_SOC', if_true: files('stm32f100_soc.c'))
+arm_common_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c'))
+arm_common_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c'))
+arm_common_ss.add(when: 'CONFIG_B_L475E_IOT01A', if_true: files('b-l475e-iot01a.c'))
+arm_common_ss.add(when: 'CONFIG_STM32L4X5_SOC', if_true: files('stm32l4x5_soc.c'))
+arm_common_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c'))
+arm_common_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal.c', 'xlnx-versal-virt.c'))
+arm_common_ss.add(when: 'CONFIG_FSL_IMX25', if_true: files('fsl-imx25.c', 'imx25_pdk.c'))
+arm_common_ss.add(when: 'CONFIG_FSL_IMX31', if_true: files('fsl-imx31.c', 'kzm.c'))
+arm_common_ss.add(when: 'CONFIG_FSL_IMX6', if_true: files('fsl-imx6.c'))
arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed.c',
'aspeed_soc_common.c',
@@ -47,33 +47,33 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast10x0.c',
'aspeed_eeprom.c',
'fby35.c'))
-arm_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files('aspeed_ast27x0.c'))
-arm_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2.c'))
-arm_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2-tz.c'))
-arm_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-soc.c'))
-arm_ss.add(when: 'CONFIG_MUSCA', if_true: files('musca.c'))
-arm_ss.add(when: 'CONFIG_ARMSSE', if_true: files('armsse.c'))
-arm_ss.add(when: 'CONFIG_FSL_IMX7', if_true: files('fsl-imx7.c', 'mcimx7d-sabre.c'))
-arm_ss.add(when: 'CONFIG_FSL_IMX8MP', if_true: files('fsl-imx8mp.c'))
-arm_ss.add(when: 'CONFIG_FSL_IMX8MP_EVK', if_true: files('imx8mp-evk.c'))
-arm_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))
-arm_ss.add(when: 'CONFIG_FSL_IMX6UL', if_true: files('fsl-imx6ul.c', 'mcimx6ul-evk.c'))
-arm_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c'))
+arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files('aspeed_ast27x0.c'))
+arm_common_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2.c'))
+arm_common_ss.add(when: 'CONFIG_MPS2', if_true: files('mps2-tz.c'))
+arm_common_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-soc.c'))
+arm_common_ss.add(when: 'CONFIG_MUSCA', if_true: files('musca.c'))
+arm_common_ss.add(when: 'CONFIG_ARMSSE', if_true: files('armsse.c'))
+arm_common_ss.add(when: 'CONFIG_FSL_IMX7', if_true: files('fsl-imx7.c', 'mcimx7d-sabre.c'))
+arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP', if_true: files('fsl-imx8mp.c'))
+arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP_EVK', if_true: files('imx8mp-evk.c'))
+arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))
+arm_common_ss.add(when: 'CONFIG_FSL_IMX6UL', if_true: files('fsl-imx6ul.c', 'mcimx6ul-evk.c'))
+arm_common_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c'))
arm_ss.add(when: 'CONFIG_XEN', if_true: files(
'xen-stubs.c',
'xen-pvh.c',
))
-system_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmu-common.c'))
-system_ss.add(when: 'CONFIG_COLLIE', if_true: files('collie.c'))
-system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4_boards.c'))
-system_ss.add(when: 'CONFIG_NETDUINO2', if_true: files('netduino2.c'))
-system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c'))
-system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2838_peripherals.c'))
-system_ss.add(when: 'CONFIG_STRONGARM', if_true: files('strongarm.c'))
-system_ss.add(when: 'CONFIG_SX1', if_true: files('omap_sx1.c'))
-system_ss.add(when: 'CONFIG_VERSATILE', if_true: files('versatilepb.c'))
-system_ss.add(when: 'CONFIG_VEXPRESS', if_true: files('vexpress.c'))
+arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmu-common.c'))
+arm_common_ss.add(when: 'CONFIG_COLLIE', if_true: files('collie.c'))
+arm_common_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4_boards.c'))
+arm_common_ss.add(when: 'CONFIG_NETDUINO2', if_true: files('netduino2.c'))
+arm_common_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c'))
+arm_common_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2838_peripherals.c'))
+arm_common_ss.add(when: 'CONFIG_STRONGARM', if_true: files('strongarm.c'))
+arm_common_ss.add(when: 'CONFIG_SX1', if_true: files('omap_sx1.c'))
+arm_common_ss.add(when: 'CONFIG_VERSATILE', if_true: files('versatilepb.c'))
+arm_common_ss.add(when: 'CONFIG_VEXPRESS', if_true: files('vexpress.c'))
arm_common_ss.add(fdt, files('boot.c'))
--
2.39.5
^ permalink raw reply related [flat|nested] 36+ messages in thread* Re: [PATCH v3 00/29] single-binary: start make hw/arm/ common
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (28 preceding siblings ...)
2025-03-25 4:59 ` [PATCH v3 29/29] hw/arm: make most of the compilation units common Pierrick Bouvier
@ 2025-03-25 5:02 ` Pierrick Bouvier
2025-03-31 22:38 ` Richard Henderson
30 siblings, 0 replies; 36+ messages in thread
From: Pierrick Bouvier @ 2025-03-25 5:02 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée
On 3/24/25 21:58, Pierrick Bouvier wrote:
> This series focuses on removing compilation units duplication in hw/arm. We
> start with this architecture because it should not be too hard to transform it,
> and should give us some good hints on the difficulties we'll meet later.
>
> We first start by making changes in global headers to be able to not rely on
> specific target defines. In particular, we completely remove cpu-all.h.
> We then focus on removing those defines from target/arm/cpu.h.
>
> From there, we modify build system to create a new hw common library (per base
> architecture, "arm" in this case), instead of compiling the same files for every
> target.
>
> Finally, we can declare hw/arm/boot.c, and most of the boards as common as a
> first step for this part.
>
> - Based-on: 20250317183417.285700-1-pierrick.bouvier@linaro.org
> ("[PATCH v6 00/18] make system memory API available for common code")
> https://lore.kernel.org/qemu-devel/20250317183417.285700-1-pierrick.bouvier@linaro.org/
> - Based-on: 20250318213209.2579218-1-richard.henderson@linaro.org
> ("[PATCH v2 00/42] accel/tcg, codebase: Build once patches")
> https://lore.kernel.org/qemu-devel/20250318213209.2579218-1-richard.henderson@linaro.org
>
> v2:
> - rebase on top of Richard series
> - add target include in hw_common lib
> - hw_common_lib uses -DCOMPILE_SYSTEM_VS_USER introduced by Richard series
> - remove cpu-all header
> - remove BSWAP_NEEDED define
> - new tlb-flags header
> - Cleanup i386 KVM_HAVE_MCE_INJECTION definition + move KVM_HAVE_MCE_INJECTION
> - remove comment about cs_base in target/arm/cpu.h
> - updated commit message about registers visibility between aarch32/aarch64
> - tried remove ifdefs in target/arm/helper.c but this resulted in more a ugly
> result. So just comment calls for now, as we'll clean this file later.
> - make most of the boards in hw/arm common
>
> v3:
> - rebase on top of Richard series and master
> - BSWAP_NEEDED commit was already merged
> - Update description for commits removing kvm related headers
>
> Pierrick Bouvier (29):
> exec/cpu-all: extract tlb flags defines to exec/tlb-flags.h
> exec/cpu-all: move cpu_copy to linux-user/qemu.h
> include/exec/cpu-all: move compile time check for CPUArchState to
> cpu-target.c
> exec/cpu-all: remove system/memory include
> exec/cpu-all: remove exec/page-protection include
> exec/cpu-all: remove tswap include
> exec/cpu-all: remove exec/cpu-interrupt include
> exec/cpu-all: remove exec/cpu-defs include
> exec/cpu-all: remove exec/target_page include
> exec/cpu-all: remove hw/core/cpu.h include
> accel/tcg: fix missing includes for TCG_GUEST_DEFAULT_MO
> accel/tcg: fix missing includes for TARGET_HAS_PRECISE_SMC
> exec/cpu-all: remove cpu include
> exec/cpu-all: transfer exec/cpu-common include to cpu.h headers
> exec/cpu-all: remove this header
> exec/target_page: runtime defintion for TARGET_PAGE_BITS_MIN
> accel/kvm: move KVM_HAVE_MCE_INJECTION define to kvm-all.c
> exec/poison: KVM_HAVE_MCE_INJECTION can now be poisoned
> target/arm/cpu: always define kvm related registers
> target/arm/cpu: flags2 is always uint64_t
> target/arm/cpu: define same set of registers for aarch32 and aarch64
> target/arm/cpu: remove inline stubs for aarch32 emulation
> meson: add common hw files
> hw/arm/boot: make compilation unit hw common
> hw/arm/armv7m: prepare compilation unit to be common
> hw/arm/digic_boards: prepare compilation unit to be common
> hw/arm/xlnx-zynqmp: prepare compilation unit to be common
> hw/arm/xlnx-versal: prepare compilation unit to be common
> hw/arm: make most of the compilation units common
>
> meson.build | 37 +++++++-
> accel/tcg/internal-target.h | 1 +
> accel/tcg/tb-internal.h | 1 -
> hw/s390x/ipl.h | 2 +
> include/exec/cpu_ldst.h | 1 +
> include/exec/exec-all.h | 1 +
> include/exec/poison.h | 4 +
> include/exec/target_page.h | 3 +
> include/exec/{cpu-all.h => tlb-flags.h} | 26 +-----
> include/hw/core/cpu.h | 2 +-
> include/qemu/bswap.h | 2 +-
> include/system/kvm.h | 2 -
> linux-user/qemu.h | 3 +
> linux-user/sparc/target_syscall.h | 2 +
> target/alpha/cpu.h | 4 +-
> target/arm/cpu.h | 40 ++------
> target/arm/internals.h | 1 +
> target/avr/cpu.h | 4 +-
> target/hexagon/cpu.h | 3 +-
> target/hppa/cpu.h | 5 +-
> target/i386/cpu.h | 5 +-
> target/i386/hvf/vmx.h | 1 +
> target/loongarch/cpu.h | 4 +-
> target/m68k/cpu.h | 4 +-
> target/microblaze/cpu.h | 4 +-
> target/mips/cpu.h | 4 +-
> target/openrisc/cpu.h | 4 +-
> target/ppc/cpu.h | 4 +-
> target/ppc/mmu-hash32.h | 2 +
> target/ppc/mmu-hash64.h | 2 +
> target/riscv/cpu.h | 4 +-
> target/rx/cpu.h | 4 +-
> target/s390x/cpu.h | 4 +-
> target/sh4/cpu.h | 4 +-
> target/sparc/cpu.h | 4 +-
> target/tricore/cpu.h | 3 +-
> target/xtensa/cpu.h | 4 +-
> accel/kvm/kvm-all.c | 5 +
> accel/tcg/cpu-exec.c | 3 +-
> accel/tcg/cputlb.c | 1 +
> accel/tcg/tb-maint.c | 1 +
> accel/tcg/translate-all.c | 1 +
> accel/tcg/user-exec.c | 2 +
> cpu-target.c | 5 +
> hw/alpha/dp264.c | 1 +
> hw/alpha/typhoon.c | 1 +
> hw/arm/armv7m.c | 8 +-
> hw/arm/boot.c | 2 +
> hw/arm/digic_boards.c | 2 +-
> hw/arm/smmuv3.c | 1 +
> hw/arm/xlnx-versal.c | 2 -
> hw/arm/xlnx-zynqmp.c | 2 -
> hw/hppa/machine.c | 1 +
> hw/i386/multiboot.c | 1 +
> hw/i386/pc.c | 1 +
> hw/i386/pc_sysfw_ovmf.c | 1 +
> hw/i386/vapic.c | 1 +
> hw/loongarch/virt.c | 1 +
> hw/m68k/next-cube.c | 1 +
> hw/m68k/q800.c | 1 +
> hw/m68k/virt.c | 1 +
> hw/openrisc/boot.c | 1 +
> hw/pci-host/astro.c | 1 +
> hw/ppc/e500.c | 1 +
> hw/ppc/mac_newworld.c | 1 +
> hw/ppc/mac_oldworld.c | 1 +
> hw/ppc/ppc.c | 1 +
> hw/ppc/ppc_booke.c | 1 +
> hw/ppc/prep.c | 1 +
> hw/ppc/spapr_hcall.c | 1 +
> hw/ppc/spapr_ovec.c | 1 +
> hw/riscv/riscv-iommu-pci.c | 1 +
> hw/riscv/riscv-iommu.c | 1 +
> hw/s390x/s390-pci-bus.c | 1 +
> hw/s390x/s390-pci-inst.c | 1 +
> hw/s390x/s390-skeys.c | 1 +
> hw/sparc/sun4m.c | 1 +
> hw/sparc64/sun4u.c | 1 +
> hw/xtensa/pic_cpu.c | 1 +
> monitor/hmp-cmds-target.c | 1 +
> semihosting/uaccess.c | 2 +-
> target/alpha/helper.c | 2 +
> target/arm/gdbstub64.c | 1 +
> target/arm/helper.c | 6 ++
> target/arm/hvf/hvf.c | 1 +
> target/arm/ptw.c | 1 +
> target/arm/tcg/helper-a64.c | 1 +
> target/arm/tcg/hflags.c | 4 +-
> target/arm/tcg/mte_helper.c | 1 +
> target/arm/tcg/sve_helper.c | 1 +
> target/arm/tcg/tlb-insns.c | 1 +
> target/avr/helper.c | 2 +
> target/hexagon/translate.c | 1 +
> target/i386/arch_memory_mapping.c | 1 +
> target/i386/helper.c | 2 +
> target/i386/hvf/hvf.c | 1 +
> target/i386/kvm/hyperv.c | 1 +
> target/i386/kvm/kvm.c | 1 +
> target/i386/kvm/xen-emu.c | 1 +
> target/i386/sev.c | 1 +
> target/i386/tcg/system/excp_helper.c | 2 +
> target/i386/tcg/system/misc_helper.c | 1 +
> target/i386/tcg/system/tcg-cpu.c | 1 +
> target/i386/xsave_helper.c | 1 +
> target/loongarch/cpu_helper.c | 1 +
> target/loongarch/tcg/translate.c | 1 +
> target/m68k/helper.c | 1 +
> target/microblaze/helper.c | 1 +
> target/microblaze/mmu.c | 1 +
> target/mips/tcg/system/cp0_helper.c | 1 +
> target/mips/tcg/translate.c | 1 +
> target/openrisc/mmu.c | 1 +
> target/ppc/excp_helper.c | 1 +
> target/ppc/mmu-book3s-v3.c | 1 +
> target/ppc/mmu-hash64.c | 1 +
> target/ppc/mmu-radix64.c | 1 +
> target/riscv/cpu_helper.c | 1 +
> target/riscv/op_helper.c | 1 +
> target/riscv/pmp.c | 1 +
> target/riscv/vector_helper.c | 2 +
> target/rx/cpu.c | 1 +
> target/s390x/helper.c | 1 +
> target/s390x/ioinst.c | 1 +
> target/s390x/tcg/mem_helper.c | 1 +
> target/sparc/ldst_helper.c | 1 +
> target/sparc/mmu_helper.c | 2 +
> target/tricore/helper.c | 1 +
> target/xtensa/helper.c | 1 +
> target/xtensa/mmu_helper.c | 1 +
> target/xtensa/op_helper.c | 1 +
> target/xtensa/xtensa-semi.c | 1 +
> tcg/tcg-op-ldst.c | 2 +-
> hw/arm/meson.build | 117 ++++++++++++------------
> 133 files changed, 286 insertions(+), 169 deletions(-)
> rename include/exec/{cpu-all.h => tlb-flags.h} (84%)
>
Patches needing review:
- [PATCH v3 16/29] exec/target_page: runtime defintion for
TARGET_PAGE_BITS_MIN
- [PATCH v3 19/29] target/arm/cpu: always define kvm related registers
This patch concerning meson build system as well:
- [PATCH v3 23/29] meson: add common hw files
Regards,
Pierrick
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH v3 00/29] single-binary: start make hw/arm/ common
2025-03-25 4:58 [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
` (29 preceding siblings ...)
2025-03-25 5:02 ` [PATCH v3 00/29] single-binary: start make hw/arm/ common Pierrick Bouvier
@ 2025-03-31 22:38 ` Richard Henderson
30 siblings, 0 replies; 36+ messages in thread
From: Richard Henderson @ 2025-03-31 22:38 UTC (permalink / raw)
To: Pierrick Bouvier, qemu-devel
Cc: Peter Maydell, qemu-arm, Paolo Bonzini,
Philippe Mathieu-Daudé, kvm, Alex Bennée
On 3/24/25 23:58, Pierrick Bouvier wrote:
> This series focuses on removing compilation units duplication in hw/arm. We
> start with this architecture because it should not be too hard to transform it,
> and should give us some good hints on the difficulties we'll meet later.
>
> We first start by making changes in global headers to be able to not rely on
> specific target defines. In particular, we completely remove cpu-all.h.
> We then focus on removing those defines from target/arm/cpu.h.
>
> From there, we modify build system to create a new hw common library (per base
> architecture, "arm" in this case), instead of compiling the same files for every
> target.
>
> Finally, we can declare hw/arm/boot.c, and most of the boards as common as a
> first step for this part.
>
> - Based-on:20250317183417.285700-1-pierrick.bouvier@linaro.org
> ("[PATCH v6 00/18] make system memory API available for common code")
> https://lore.kernel.org/qemu-devel/20250317183417.285700-1-pierrick.bouvier@linaro.org/
> - Based-on:20250318213209.2579218-1-richard.henderson@linaro.org
> ("[PATCH v2 00/42] accel/tcg, codebase: Build once patches")
> https://lore.kernel.org/qemu-devel/20250318213209.2579218-1-richard.henderson@linaro.org
>
> v2:
> - rebase on top of Richard series
> - add target include in hw_common lib
> - hw_common_lib uses -DCOMPILE_SYSTEM_VS_USER introduced by Richard series
> - remove cpu-all header
> - remove BSWAP_NEEDED define
> - new tlb-flags header
> - Cleanup i386 KVM_HAVE_MCE_INJECTION definition + move KVM_HAVE_MCE_INJECTION
> - remove comment about cs_base in target/arm/cpu.h
> - updated commit message about registers visibility between aarch32/aarch64
> - tried remove ifdefs in target/arm/helper.c but this resulted in more a ugly
> result. So just comment calls for now, as we'll clean this file later.
> - make most of the boards in hw/arm common
>
> v3:
> - rebase on top of Richard series and master
> - BSWAP_NEEDED commit was already merged
> - Update description for commits removing kvm related headers
Thanks. Queued to tcg-next.
r~
^ permalink raw reply [flat|nested] 36+ messages in thread