From: Richard Henderson <richard.henderson@linaro.org>
To: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
qemu-devel@nongnu.org
Subject: Re: [PATCH v3 8/8] target/tricore: Add DISABLE insn variant
Date: Wed, 14 Jun 2023 14:11:33 +0200 [thread overview]
Message-ID: <31ae990e-4e79-58ef-7643-a291c16c86cd@linaro.org> (raw)
In-Reply-To: <20230614100039.1337971-9-kbastian@mail.uni-paderborn.de>
On 6/14/23 12:00, Bastian Koppelmann wrote:
> this variant saves the 'IE' bit to a 'd' register. The 'IE' bitfield
> changed from ISA version 1.6.1, so we add icr_ie_offset to DisasContext
> as with the other DISABLE insn.
>
> Signed-off-by: Bastian Koppelmann<kbastian@mail.uni-paderborn.de>
> ---
> target/tricore/translate.c | 11 ++++++++++-
> target/tricore/tricore-opcodes.h | 1 +
> 2 files changed, 11 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
prev parent reply other threads:[~2023-06-14 12:12 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-14 10:00 [PATCH v3 0/8] TriCore 1.6.2 Instructions Bastian Koppelmann
2023-06-14 10:00 ` [PATCH v3 1/8] target/tricore: Introduce ISA 1.6.2 feature Bastian Koppelmann
2023-06-14 10:00 ` [PATCH v3 2/8] target/tricore: Add popcnt.w insn Bastian Koppelmann
2023-06-14 10:00 ` [PATCH v3 3/8] target/tricore: Add LHA insn Bastian Koppelmann
2023-06-14 10:00 ` [PATCH v3 4/8] target/tricore: Add crc32l.w insn Bastian Koppelmann
2023-06-14 10:00 ` [PATCH v3 5/8] target/tricore: Add crc32.b insn Bastian Koppelmann
2023-06-14 10:00 ` [PATCH v3 6/8] target/tricore: Add shuffle insn Bastian Koppelmann
2023-06-14 10:00 ` [PATCH v3 7/8] target/tricore: Implement SYCSCALL insn Bastian Koppelmann
2023-06-14 12:04 ` Richard Henderson
2023-06-14 10:00 ` [PATCH v3 8/8] target/tricore: Add DISABLE insn variant Bastian Koppelmann
2023-06-14 12:11 ` Richard Henderson [this message]
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