qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Julian Ganz <neither@nut.email>
To: qemu-devel@nongnu.org
Cc: Julian Ganz <neither@nut.email>,
	Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org (open list:ARM TCG CPUs)
Subject: [PATCH v6 06/25] target/arm: call plugin trap callbacks
Date: Thu,  4 Sep 2025 22:46:43 +0200	[thread overview]
Message-ID: <3230bddf690d5facd44fb22da9cc006ddb46465b.1757018626.git.neither@nut.email> (raw)
In-Reply-To: <cover.1757018626.git.neither@nut.email>

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for ARM (and Aarch64) targets. We decided to
treat the (V)IRQ, (VI/VF)NMI, (V)FIQ and VSERR exceptions as interrupts
since they are, presumably, async in nature.

Signed-off-by: Julian Ganz <neither@nut.email>
---
 target/arm/helper.c       | 24 ++++++++++++++++++++++++
 target/arm/internals.h    |  1 +
 target/arm/tcg/m_helper.c |  5 +++++
 3 files changed, 30 insertions(+)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 19637e7301..4812b30d64 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -34,6 +34,7 @@
 #endif
 #include "cpregs.h"
 #include "target/arm/gtimer.h"
+#include "qemu/plugin.h"
 
 #define HELPER_H "tcg/helper.h"
 #include "exec/helper-proto.h.inc"
@@ -8585,6 +8586,24 @@ static void take_aarch32_exception(CPUARMState *env, int new_mode,
     }
 }
 
+void arm_do_plugin_vcpu_discon_cb(CPUState *cs, uint64_t from)
+{
+    switch (cs->exception_index) {
+    case EXCP_IRQ:
+    case EXCP_VIRQ:
+    case EXCP_NMI:
+    case EXCP_VINMI:
+    case EXCP_FIQ:
+    case EXCP_VFIQ:
+    case EXCP_VFNMI:
+    case EXCP_VSERR:
+        qemu_plugin_vcpu_interrupt_cb(cs, from);
+        break;
+    default:
+        qemu_plugin_vcpu_exception_cb(cs, from);
+    }
+}
+
 static void arm_cpu_do_interrupt_aarch32_hyp(CPUState *cs)
 {
     /*
@@ -9251,6 +9270,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
     ARMCPU *cpu = ARM_CPU(cs);
     CPUARMState *env = &cpu->env;
     unsigned int new_el = env->exception.target_el;
+    uint64_t last_pc = cs->cc->get_pc(cs);
 
     assert(!arm_feature(env, ARM_FEATURE_M));
 
@@ -9267,6 +9287,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
     if (tcg_enabled() && arm_is_psci_call(cpu, cs->exception_index)) {
         arm_handle_psci_call(cpu);
         qemu_log_mask(CPU_LOG_INT, "...handled as PSCI call\n");
+        qemu_plugin_vcpu_hostcall_cb(cs, last_pc);
         return;
     }
 
@@ -9278,6 +9299,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
 #ifdef CONFIG_TCG
     if (cs->exception_index == EXCP_SEMIHOST) {
         tcg_handle_semihosting(cs);
+        qemu_plugin_vcpu_hostcall_cb(cs, last_pc);
         return;
     }
 #endif
@@ -9303,6 +9325,8 @@ void arm_cpu_do_interrupt(CPUState *cs)
     if (!kvm_enabled()) {
         cpu_set_interrupt(cs, CPU_INTERRUPT_EXITTB);
     }
+
+    arm_do_plugin_vcpu_discon_cb(cs, last_pc);
 }
 #endif /* !CONFIG_USER_ONLY */
 
diff --git a/target/arm/internals.h b/target/arm/internals.h
index f5a1e75db3..369ec2912b 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -373,6 +373,7 @@ static inline int r14_bank_number(int mode)
 
 void arm_cpu_register(const ARMCPUInfo *info);
 
+void arm_do_plugin_vcpu_discon_cb(CPUState *cs, uint64_t from);
 void register_cp_regs_for_features(ARMCPU *cpu);
 void init_cpreg_list(ARMCPU *cpu);
 
diff --git a/target/arm/tcg/m_helper.c b/target/arm/tcg/m_helper.c
index 28307b5615..31d9a59ed6 100644
--- a/target/arm/tcg/m_helper.c
+++ b/target/arm/tcg/m_helper.c
@@ -23,6 +23,7 @@
 #if !defined(CONFIG_USER_ONLY)
 #include "hw/intc/armv7m_nvic.h"
 #endif
+#include "qemu/plugin.h"
 
 static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask,
                          uint32_t reg, uint32_t val)
@@ -2194,6 +2195,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
     CPUARMState *env = &cpu->env;
     uint32_t lr;
     bool ignore_stackfaults;
+    uint64_t last_pc = env->regs[15];
 
     arm_log_exception(cs);
 
@@ -2361,6 +2363,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
         g_assert_not_reached();
 #endif
         env->regs[15] += env->thumb ? 2 : 4;
+        qemu_plugin_vcpu_hostcall_cb(cs, last_pc);
         return;
     case EXCP_BKPT:
         armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_DEBUG, false);
@@ -2427,6 +2430,8 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
 
     ignore_stackfaults = v7m_push_stack(cpu);
     v7m_exception_taken(cpu, lr, false, ignore_stackfaults);
+
+    arm_do_plugin_vcpu_discon_cb(cs, last_pc);
 }
 
 uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg)
-- 
2.49.1



  parent reply	other threads:[~2025-09-04 20:51 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-04 20:46 [PATCH v6 00/25] tcg-plugins: add hooks for discontinuities Julian Ganz
2025-09-04 20:46 ` [PATCH v6 01/25] plugins: add types for callbacks related to certain discontinuities Julian Ganz
2025-09-04 20:46 ` [PATCH v6 02/25] plugins: add API for registering discontinuity callbacks Julian Ganz
2025-09-04 20:46 ` [PATCH v6 03/25] plugins: add hooks for new discontinuity related callbacks Julian Ganz
2025-09-22 11:34   ` Philippe Mathieu-Daudé
2025-09-22 20:57     ` Julian Ganz
2025-09-04 20:46 ` [PATCH v6 04/25] contrib/plugins: add plugin showcasing new dicontinuity related API Julian Ganz
2025-09-04 20:46 ` [PATCH v6 05/25] target/alpha: call plugin trap callbacks Julian Ganz
2025-09-04 20:46 ` Julian Ganz [this message]
2025-09-04 20:46 ` [PATCH v6 07/25] target/avr: " Julian Ganz
2025-09-04 20:46 ` [PATCH v6 08/25] target/hppa: " Julian Ganz
2025-09-22 11:38   ` Philippe Mathieu-Daudé
2025-09-22 21:09     ` Julian Ganz
2025-09-04 20:46 ` [PATCH v6 09/25] target/i386: " Julian Ganz
2025-09-04 20:46 ` [PATCH v6 10/25] target/loongarch: " Julian Ganz
2025-09-04 20:46 ` [PATCH v6 11/25] target/m68k: " Julian Ganz
2025-09-04 20:46 ` [PATCH v6 12/25] target/microblaze: " Julian Ganz
2025-09-04 20:46 ` [PATCH v6 13/25] target/mips: " Julian Ganz
2025-09-22 11:45   ` Philippe Mathieu-Daudé
2025-09-04 20:46 ` [PATCH v6 14/25] target/openrisc: " Julian Ganz
2025-09-04 20:46 ` [PATCH v6 15/25] target/ppc: " Julian Ganz
2025-09-04 20:46 ` [PATCH v6 16/25] target/riscv: " Julian Ganz
2025-09-04 20:46 ` [PATCH v6 17/25] target/rx: " Julian Ganz
2025-09-07 14:20   ` yoshinori.sato
2025-09-04 20:46 ` [PATCH v6 18/25] target/s390x: " Julian Ganz
2025-09-04 20:46 ` [PATCH v6 19/25] target/sh4: " Julian Ganz
2025-09-07 14:20   ` yoshinori.sato
2025-09-04 20:46 ` [PATCH v6 20/25] target/sparc: " Julian Ganz
2025-09-04 20:48   ` Julian Ganz
2025-09-04 20:48 ` [PATCH v6 21/25] target/tricore: " Julian Ganz
2025-09-04 20:48 ` [PATCH v6 22/25] target/xtensa: " Julian Ganz
2025-09-22 11:47   ` Philippe Mathieu-Daudé
2025-09-22 21:12     ` Julian Ganz
2025-09-04 20:48 ` [PATCH v6 23/25] tests: add plugin asserting correctness of discon event's to_pc Julian Ganz
2025-09-21 16:46   ` Alex Bennée
2025-09-22 10:11     ` Julian Ganz
2025-09-22 10:15       ` Daniel P. Berrangé
2025-09-23 20:29       ` Julian Ganz
2025-09-24 15:31         ` Julian Ganz
2025-09-25 10:41           ` Alex Bennée
2025-09-25 12:42             ` Julian Ganz
2025-09-04 20:48 ` [PATCH v6 24/25] tests: add test for double-traps on rv64 Julian Ganz
2025-09-04 20:49 ` [PATCH v6 25/25] tests: add test with interrupted memory accesses " Julian Ganz
2025-09-05 11:38 ` [PATCH v6 00/25] tcg-plugins: add hooks for discontinuities BALATON Zoltan
2025-09-05 12:20   ` Alex Bennée
2025-09-05 13:43   ` Julian Ganz
2025-09-05 19:25     ` BALATON Zoltan
2025-09-05 23:28       ` Julian Ganz
2025-09-07 20:21         ` BALATON Zoltan
2025-09-08 20:51           ` Julian Ganz
2025-09-09 19:48           ` Julian Ganz
2025-09-10 10:06             ` BALATON Zoltan
2025-09-10 11:41               ` Julian Ganz
2025-09-10 12:09                 ` Alex Bennée
2025-09-10 15:04                   ` BALATON Zoltan
2025-09-22 11:31 ` Philippe Mathieu-Daudé
2025-09-22 20:54   ` Julian Ganz

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3230bddf690d5facd44fb22da9cc006ddb46465b.1757018626.git.neither@nut.email \
    --to=neither@nut.email \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).