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([2806:102e:18:2efc:7b4f:f28b:eca6:b583]) by smtp.gmail.com with ESMTPSA id m17-20020a056870561100b0012763819bcasm3850934oao.50.2022.12.11.08.24.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 11 Dec 2022 08:24:53 -0800 (PST) Message-ID: <334a4beb-9c14-508c-9855-a723779eb239@linaro.org> Date: Sun, 11 Dec 2022 10:24:50 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH-for-8.0 5/7] hw/mips/bootloader: Implement nanoMIPS SW opcode Content-Language: en-US To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , qemu-devel@nongnu.org Cc: Milica Lazarevic , Dragan Mladjenovic , Aurelien Jarno , Djordje Todorovic , Jiaxun Yang , Bernhard Beschow References: <20221210155502.74609-1-philmd@linaro.org> <20221210155502.74609-6-philmd@linaro.org> From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2001:4860:4864:20::2f; envelope-from=richard.henderson@linaro.org; helo=mail-oa1-x2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/10/22 10:02, Philippe Mathieu-Daudé wrote: > On 10/12/22 16:55, Philippe Mathieu-Daudé wrote: >> Signed-off-by: Philippe Mathieu-Daudé >> --- >>   hw/mips/bootloader.c | 24 +++++++++++++++++++++++- >>   1 file changed, 23 insertions(+), 1 deletion(-) >> >> diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c >> index 997e74ee52..cc3df385df 100644 >> --- a/hw/mips/bootloader.c >> +++ b/hw/mips/bootloader.c >> @@ -150,9 +150,31 @@ static void bl_gen_lui(void **p, bl_reg rt, uint32_t imm32) >>       } >>   } >> +static void bl_gen_ori_nm(void **ptr, bl_reg rt, bl_reg rs, uint16_t imm) >> +{ >> +    uint16_t *p = (uint16_t *)*ptr; >> +    uint32_t insn = 0; > > Similarly, we should check whether imm fits in 12-bit. I think you should simply split at the "li" level instead of lui+ori. r~ > >> +    insn = deposit32(insn, 26, 6, 0b100000); >> +    insn = deposit32(insn, 21, 5, rt); >> +    insn = deposit32(insn, 16, 5, rs); >> +    insn = deposit32(insn, 0, 12, imm); >> + >> +    stw_p(p, insn >> 16); >> +    p++; >> +    stw_p(p, insn >> 0); >> +    p++; >> + >> +    *ptr = p; >> +} > >