qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Akihiko Odaki <akihiko.odaki@daynix.com>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
	Sriram Yagnaraman <sriram.yagnaraman@ericsson.com>,
	Jason Wang <jasowang@redhat.com>, Keith Busch <kbusch@kernel.org>,
	Klaus Jensen <its@irrelevant.dk>,
	Jesper Devantier <foss@defmacro.it>,
	qemu-block@nongnu.org
Subject: [PULL 09/41] pcie_sriov: Ensure VF addr does not overflow
Date: Fri, 21 Feb 2025 07:23:01 -0500	[thread overview]
Message-ID: <3391d68e906114c364c173c7f3f7389d47d15a11.1740140520.git.mst@redhat.com> (raw)
In-Reply-To: <cover.1740140520.git.mst@redhat.com>

From: Akihiko Odaki <akihiko.odaki@daynix.com>

pci_new() aborts when creating a VF with addr >= PCI_DEVFN_MAX.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20250116-reuse-v20-7-7cb370606368@daynix.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 docs/pcie_sriov.txt         |  8 +++++---
 include/hw/pci/pcie_sriov.h |  5 +++--
 hw/net/igb.c                | 10 +++++++---
 hw/nvme/ctrl.c              | 22 ++++++++++++++--------
 hw/pci/pcie_sriov.c         | 14 ++++++++++++--
 5 files changed, 41 insertions(+), 18 deletions(-)

diff --git a/docs/pcie_sriov.txt b/docs/pcie_sriov.txt
index a47aad0bfa..ab2142807f 100644
--- a/docs/pcie_sriov.txt
+++ b/docs/pcie_sriov.txt
@@ -52,9 +52,11 @@ setting up a BAR for a VF.
       ...
 
       /* Add and initialize the SR/IOV capability */
-      pcie_sriov_pf_init(d, 0x200, "your_virtual_dev",
-                       vf_devid, initial_vfs, total_vfs,
-                       fun_offset, stride);
+      if (!pcie_sriov_pf_init(d, 0x200, "your_virtual_dev",
+                              vf_devid, initial_vfs, total_vfs,
+                              fun_offset, stride, errp)) {
+         return;
+      }
 
       /* Set up individual VF BARs (parameters as for normal BARs) */
       pcie_sriov_pf_init_vf_bar( ... )
diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h
index 450cbef6c2..aa704e8f9d 100644
--- a/include/hw/pci/pcie_sriov.h
+++ b/include/hw/pci/pcie_sriov.h
@@ -27,10 +27,11 @@ typedef struct PCIESriovVF {
     uint16_t vf_number; /* Logical VF number of this function */
 } PCIESriovVF;
 
-void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset,
+bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset,
                         const char *vfname, uint16_t vf_dev_id,
                         uint16_t init_vfs, uint16_t total_vfs,
-                        uint16_t vf_offset, uint16_t vf_stride);
+                        uint16_t vf_offset, uint16_t vf_stride,
+                        Error **errp);
 void pcie_sriov_pf_exit(PCIDevice *dev);
 
 /* Set up a VF bar in the SR/IOV bar area */
diff --git a/hw/net/igb.c b/hw/net/igb.c
index 4d93ce629f..c965fc2fb6 100644
--- a/hw/net/igb.c
+++ b/hw/net/igb.c
@@ -446,9 +446,13 @@ static void igb_pci_realize(PCIDevice *pci_dev, Error **errp)
 
     pcie_ari_init(pci_dev, 0x150);
 
-    pcie_sriov_pf_init(pci_dev, IGB_CAP_SRIOV_OFFSET, TYPE_IGBVF,
-        IGB_82576_VF_DEV_ID, IGB_MAX_VF_FUNCTIONS, IGB_MAX_VF_FUNCTIONS,
-        IGB_VF_OFFSET, IGB_VF_STRIDE);
+    if (!pcie_sriov_pf_init(pci_dev, IGB_CAP_SRIOV_OFFSET, TYPE_IGBVF,
+                            IGB_82576_VF_DEV_ID, IGB_MAX_VF_FUNCTIONS,
+                            IGB_MAX_VF_FUNCTIONS, IGB_VF_OFFSET, IGB_VF_STRIDE,
+                            errp)) {
+        igb_cleanup_msix(s);
+        return;
+    }
 
     pcie_sriov_pf_init_vf_bar(pci_dev, IGBVF_MMIO_BAR_IDX,
         PCI_BASE_ADDRESS_MEM_TYPE_64 | PCI_BASE_ADDRESS_MEM_PREFETCH,
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 68903d1d70..8175751518 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -8481,7 +8481,8 @@ out:
     return pow2ceil(bar_size);
 }
 
-static void nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset)
+static bool nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset,
+                            Error **errp)
 {
     uint16_t vf_dev_id = n->params.use_intel_id ?
                          PCI_DEVICE_ID_INTEL_NVME : PCI_DEVICE_ID_REDHAT_NVME;
@@ -8490,12 +8491,16 @@ static void nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset)
                                       le16_to_cpu(cap->vifrsm),
                                       NULL, NULL);
 
-    pcie_sriov_pf_init(pci_dev, offset, "nvme", vf_dev_id,
-                       n->params.sriov_max_vfs, n->params.sriov_max_vfs,
-                       NVME_VF_OFFSET, NVME_VF_STRIDE);
+    if (!pcie_sriov_pf_init(pci_dev, offset, "nvme", vf_dev_id,
+                            n->params.sriov_max_vfs, n->params.sriov_max_vfs,
+                            NVME_VF_OFFSET, NVME_VF_STRIDE, errp)) {
+        return false;
+    }
 
     pcie_sriov_pf_init_vf_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
                               PCI_BASE_ADDRESS_MEM_TYPE_64, bar_size);
+
+    return true;
 }
 
 static int nvme_add_pm_capability(PCIDevice *pci_dev, uint8_t offset)
@@ -8620,6 +8625,11 @@ static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp)
         return false;
     }
 
+    if (!pci_is_vf(pci_dev) && n->params.sriov_max_vfs &&
+        !nvme_init_sriov(n, pci_dev, 0x120, errp)) {
+        return false;
+    }
+
     nvme_update_msixcap_ts(pci_dev, n->conf_msix_qsize);
 
     pcie_cap_deverr_init(pci_dev);
@@ -8649,10 +8659,6 @@ static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp)
         nvme_init_pmr(n, pci_dev);
     }
 
-    if (!pci_is_vf(pci_dev) && n->params.sriov_max_vfs) {
-        nvme_init_sriov(n, pci_dev, 0x120);
-    }
-
     return true;
 }
 
diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c
index 499becd527..91c64c988e 100644
--- a/hw/pci/pcie_sriov.c
+++ b/hw/pci/pcie_sriov.c
@@ -24,14 +24,22 @@ static PCIDevice *register_vf(PCIDevice *pf, int devfn,
                               const char *name, uint16_t vf_num);
 static void unregister_vfs(PCIDevice *dev);
 
-void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset,
+bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset,
                         const char *vfname, uint16_t vf_dev_id,
                         uint16_t init_vfs, uint16_t total_vfs,
-                        uint16_t vf_offset, uint16_t vf_stride)
+                        uint16_t vf_offset, uint16_t vf_stride,
+                        Error **errp)
 {
+    int32_t devfn = dev->devfn + vf_offset;
     uint8_t *cfg = dev->config + offset;
     uint8_t *wmask;
 
+    if (total_vfs &&
+        (uint32_t)devfn + (uint32_t)(total_vfs - 1) * vf_stride >= PCI_DEVFN_MAX) {
+        error_setg(errp, "VF addr overflows");
+        return false;
+    }
+
     pcie_add_capability(dev, PCI_EXT_CAP_ID_SRIOV, 1,
                         offset, PCI_EXT_CAP_SRIOV_SIZEOF);
     dev->exp.sriov_cap = offset;
@@ -69,6 +77,8 @@ void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset,
     pci_set_word(wmask + PCI_SRIOV_SYS_PGSIZE, 0x553);
 
     qdev_prop_set_bit(&dev->qdev, "multifunction", true);
+
+    return true;
 }
 
 void pcie_sriov_pf_exit(PCIDevice *dev)
-- 
MST



  parent reply	other threads:[~2025-02-21 12:28 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-21 12:22 [PULL 00/41] virtio,pc,pci: features, fixes, cleanups Michael S. Tsirkin
2025-02-21 12:22 ` [PULL 01/41] docs/about: Change notes on x86 machine type deprecation into a general one Michael S. Tsirkin
2025-02-21 12:22 ` [PULL 02/41] hw/net: Fix NULL dereference with software RSS Michael S. Tsirkin
2025-02-27  9:51   ` Michael Tokarev
2025-02-21 12:22 ` [PULL 03/41] hw/ppc/spapr_pci: Do not create DT for disabled PCI device Michael S. Tsirkin
2025-02-21 12:22 ` [PULL 04/41] hw/ppc/spapr_pci: Do not reject VFs created after a PF Michael S. Tsirkin
2025-02-21 12:22 ` [PULL 05/41] s390x/pci: Avoid creating zpci for VFs Michael S. Tsirkin
2025-02-21 12:22 ` [PULL 06/41] s390x/pci: Allow plugging SR-IOV devices Michael S. Tsirkin
2025-02-21 12:22 ` [PULL 07/41] s390x/pci: Check for multifunction after device realization Michael S. Tsirkin
2025-02-21 12:22 ` [PULL 08/41] pcie_sriov: Do not manually unrealize Michael S. Tsirkin
2025-02-21 12:23 ` Michael S. Tsirkin [this message]
2025-02-21 12:23 ` [PULL 10/41] pcie_sriov: Reuse SR-IOV VF device instances Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 11/41] pcie_sriov: Release VFs failed to realize Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 12/41] pcie_sriov: Remove num_vfs from PCIESriovPF Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 13/41] pcie_sriov: Register VFs after migration Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 14/41] qtest/libqos/pci: Do not write to PBA memory Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 15/41] hw/pci/msix: Warn on PBA writes Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 16/41] hw/pci: Assert a bar is not registered multiple times Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 17/41] hw/i386/pc: Fix crash that occurs when introspecting TYPE_PC_MACHINE machines Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 18/41] hw/i386/microvm: Fix crash that occurs when introspecting the microvm machine Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 19/41] tests/qtest/vhost-user-test: Use modern virtio for vhost-user tests Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 20/41] hw/cxl: Introduce CXL_T3_MSIX_VECTOR enumeration Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 21/41] hw/mem/cxl_type3: Add paired msix_uninit_exclusive_bar() call Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 22/41] hw/mem/cxl_type3: Fix special_ops memory leak on msix_init_exclusive_bar() failure Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 23/41] hw/mem/cxl_type3: Ensure errp is set on realization failure Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 24/41] mem/cxl_type3: support 3, 6, 12 and 16 interleave ways Michael S. Tsirkin
2025-02-21 12:23 ` [PULL 25/41] hw/virtio: reset virtio balloon stats on machine reset Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 26/41] amd_iommu: Use correct DTE field for interrupt passthrough Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 27/41] amd_iommu: Use correct bitmask to set capability BAR Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 28/41] vhost-iova-tree: Implement an IOVA-only tree Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 29/41] vhost-iova-tree, svq: Implement GPA->IOVA & partial IOVA->HVA trees Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 30/41] vhost-iova-tree: Update documentation Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 31/41] cryptodev/vhost: allocate CryptoDevBackendVhost using g_mem0() Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 32/41] MAINTAINERS: add more files to `vhost` Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 33/41] vdpa: Fix endian bugs in shadow virtqueue Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 34/41] hw/virtio/virtio-nsm: Respond with correct length Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 35/41] net: vhost-user: add QAPI events to report connection state Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 36/41] vhost-user-snd: correct the calculation of config_size Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 37/41] hw/virtio/virtio-iommu: Migrate to 3-phase reset Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 38/41] hw/i386/intel-iommu: " Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 39/41] hw/arm/smmuv3: Move reset to exit phase Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 40/41] hw/vfio/common: Add a trace point in vfio_reset_handler Michael S. Tsirkin
2025-02-21 12:24 ` [PULL 41/41] docs/devel/reset: Document reset expectations for DMA and IOMMU Michael S. Tsirkin
2025-02-21 23:17 ` [PULL 00/41] virtio,pc,pci: features, fixes, cleanups Stefan Hajnoczi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3391d68e906114c364c173c7f3f7389d47d15a11.1740140520.git.mst@redhat.com \
    --to=mst@redhat.com \
    --cc=akihiko.odaki@daynix.com \
    --cc=foss@defmacro.it \
    --cc=its@irrelevant.dk \
    --cc=jasowang@redhat.com \
    --cc=kbusch@kernel.org \
    --cc=marcel.apfelbaum@gmail.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-block@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=sriram.yagnaraman@ericsson.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).