Re: [PATCH v2 01/10] target/loongarch: Enable the disassembler for host tcg

[WANG Xuerui <i.qemu@xen0n.name>]

On 1/18/23 09:11, Richard Henderson wrote:
> Reuse the decodetree based disassembler from
> target/loongarch/ for tcg/loongarch64/.
>
> The generation of decode-insns.c.inc into ./libcommon.fa.p/ could
> eventually result in conflict, if any other host requires the same
> trick, but this is good enough for now.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   disas.c                      | 2 ++
>   target/loongarch/meson.build | 3 ++-
>   2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/disas.c b/disas.c
> index 3b31315f40..c9fa38e6d7 100644
> --- a/disas.c
> +++ b/disas.c
> @@ -198,6 +198,8 @@ static void initialize_debug_host(CPUDebug *s)
>       s->info.cap_insn_split = 6;
>   #elif defined(__hppa__)
>       s->info.print_insn = print_insn_hppa;
> +#elif defined(__loongarch64)
This could just be `__loongarch__` because both LA32 and LA64 share the 
same encoding, so although LA32 userland isn't quite there yet it 
wouldn't do any harm.
> +    s->info.print_insn = print_insn_loongarch;
>   #endif
>   }
>   
> diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
> index 6376f9e84b..690633969f 100644
> --- a/target/loongarch/meson.build
> +++ b/target/loongarch/meson.build
> @@ -3,7 +3,6 @@ gen = decodetree.process('insns.decode')
>   loongarch_ss = ss.source_set()
>   loongarch_ss.add(files(
>     'cpu.c',
> -  'disas.c',
>   ))
>   loongarch_tcg_ss = ss.source_set()
>   loongarch_tcg_ss.add(gen)
> @@ -24,6 +23,8 @@ loongarch_softmmu_ss.add(files(
>     'iocsr_helper.c',
>   ))
>   
> +common_ss.add(when: 'CONFIG_LOONGARCH_DIS', if_true: [files('disas.c'), gen])
> +
>   loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
>   
>   target_arch += {'loongarch': loongarch_ss}

Apart from the minor suggestion above,

Reviewed-by: WANG Xuerui <git@xen0n.name>

Thanks!