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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4562e89c313sm15311765e9.28.2025.07.16.02.22.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 16 Jul 2025 02:22:24 -0700 (PDT) Message-ID: <342129d6-0b96-440c-83ac-e9b8bc5b18a0@redhat.com> Date: Wed, 16 Jul 2025 11:22:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 07/20] intel_iommu: Check for compatibility with IOMMUFD backed device when x-flts=on Content-Language: en-US To: Zhenzhong Duan , qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, mst@redhat.com, jasowang@redhat.com, peterx@redhat.com, ddutile@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, shameerali.kolothum.thodi@huawei.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com References: <20250708110601.633308-1-zhenzhong.duan@intel.com> <20250708110601.633308-8-zhenzhong.duan@intel.com> From: Eric Auger In-Reply-To: <20250708110601.633308-8-zhenzhong.duan@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Zhenzhong, On 7/8/25 1:05 PM, Zhenzhong Duan wrote: > When vIOMMU is configured x-flts=on in scalable mode, stage-1 page table > is passed to host to construct nested page table. We need to check > compatibility of some critical IOMMU capabilities between vIOMMU and > host IOMMU to ensure guest stage-1 page table could be used by host. > > For instance, vIOMMU supports stage-1 1GB huge page mapping, but host > does not, then this IOMMUFD backed device should fail. > > Even of the checks pass, for now we willingly reject the association > because all the bits are not there yet. > > Signed-off-by: Yi Liu > Signed-off-by: Zhenzhong Duan > --- > hw/i386/intel_iommu.c | 30 +++++++++++++++++++++++++++++- > hw/i386/intel_iommu_internal.h | 1 + > 2 files changed, 30 insertions(+), 1 deletion(-) > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index e90fd2f28f..c57ca02cdd 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -40,6 +40,7 @@ > #include "kvm/kvm_i386.h" > #include "migration/vmstate.h" > #include "trace.h" > +#include "system/iommufd.h" > > /* context entry operations */ > #define VTD_CE_GET_RID2PASID(ce) \ > @@ -4355,7 +4356,34 @@ static bool vtd_check_hiod(IntelIOMMUState *s, HostIOMMUDevice *hiod, > return true; > } > > - error_setg(errp, "host device is uncompatible with stage-1 translation"); > +#ifdef CONFIG_IOMMUFD > + struct HostIOMMUDeviceCaps *caps = &hiod->caps; > + struct iommu_hw_info_vtd *vtd = &caps->vendor_caps.vtd; I am now confused about how this relates to vtd_get_viommu_cap(). PCIIOMMUOps.set_iommu_device = vtd_dev_set_iommu_device calls vtd_check_hiod() viommu might return HW_NESTED_CAP through PCIIOMMUOps.get_viommu_cap without making sure the underlying HW IOMMU does support it. Is that a correct understanding? Maybe we should clarify the calling order between set_iommu_device vs get_viommu_cap? Could we check HW IOMMU prerequisites in vtd_get_viommu_cap() by enforcing this is called after set_iommu_device. I think we should clarify the exact semantic of get_viommu_cap().Thanks Eric > + > + /* Remaining checks are all stage-1 translation specific */ > + if (!object_dynamic_cast(OBJECT(hiod), TYPE_HOST_IOMMU_DEVICE_IOMMUFD)) { > + error_setg(errp, "Need IOMMUFD backend when x-flts=on"); > + return false; > + } > + > + if (caps->type != IOMMU_HW_INFO_TYPE_INTEL_VTD) { > + error_setg(errp, "Incompatible host platform IOMMU type %d", > + caps->type); > + return false; > + } > + > + if (!(vtd->ecap_reg & VTD_ECAP_NEST)) { > + error_setg(errp, "Host IOMMU doesn't support nested translation"); > + return false; > + } > + > + if (s->fs1gp && !(vtd->cap_reg & VTD_CAP_FS1GP)) { > + error_setg(errp, "Stage-1 1GB huge page is unsupported by host IOMMU"); > + return false; > + } > +#endif > + > + error_setg(errp, "host IOMMU is incompatible with stage-1 translation"); > return false; > } > > diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h > index 7aba259ef8..18bc22fc72 100644 > --- a/hw/i386/intel_iommu_internal.h > +++ b/hw/i386/intel_iommu_internal.h > @@ -192,6 +192,7 @@ > #define VTD_ECAP_PT (1ULL << 6) > #define VTD_ECAP_SC (1ULL << 7) > #define VTD_ECAP_MHMV (15ULL << 20) > +#define VTD_ECAP_NEST (1ULL << 26) > #define VTD_ECAP_SRS (1ULL << 31) > #define VTD_ECAP_PASID (1ULL << 40) > #define VTD_ECAP_SMTS (1ULL << 43)