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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id m12-20020a1709026bcc00b0019498ee0cf4sm291359plt.109.2023.01.23.16.20.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 Jan 2023 16:20:14 -0800 (PST) Message-ID: <3443cf40-4013-6ac6-895d-08f86c229809@linaro.org> Date: Mon, 23 Jan 2023 14:20:11 -1000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH 2/2] target/arm: Look up ARMCPRegInfo at runtime To: Peter Maydell Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org References: <20230106194451.1213153-1-richard.henderson@linaro.org> <20230106194451.1213153-3-richard.henderson@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.147, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/23/23 02:53, Peter Maydell wrote: > On Fri, 6 Jan 2023 at 19:45, Richard Henderson > wrote: >> >> Do not encode the pointer as a constant in the opcode stream. >> This pointer is specific to the cpu that first generated the >> translation, which runs into problems with both hot-pluggable >> cpus and user-only threads, as cpus are removed. >> >> Perform the lookup in either helper_access_check_cp_reg, >> or a new helper_lookup_cp_reg. > > As well as the use-after-free, this is also a correctness > bug, isn't it? If we hardwire in the cpregs pointer for > CPU 0 into the TB, and then CPU 1 with a slightly different > config executes the TB, it will get the cpregs of CPU 0, > not its own, so it might see a register it should not or > vice-versa. Existing assumption was that each cpu configuration would have its own cluster_index, which gets encoded into cpu->tcg_cflags, which is part of the comparison used when hashing TBs. But including this patch allows relaxation of what constitutes a "cpu configuration". r~