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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-477a96aa472sm85902195e9.0.2025.11.20.23.12.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 Nov 2025 23:12:43 -0800 (PST) Message-ID: <34ec72d0-dafa-418c-9372-d5d033a93c0d@linaro.org> Date: Fri, 21 Nov 2025 08:12:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] hw/arm/armv7m: Disable reentrancy guard for v7m_sysreg_ns_ops MRs Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20251114155304.2662414-1-peter.maydell@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20251114155304.2662414-1-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::643; envelope-from=philmd@linaro.org; helo=mail-ej1-x643.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 14/11/25 16:53, Peter Maydell wrote: > For M-profile cores which support TrustZone, there are some memory > areas which are "NS aliases" -- a Secure access to these addresses > really performs an NS access to a different part of the device. We > implement these using MemoryRegionOps read and write functions which > pass the access on with adjusted attributes using > memory_region_dispatch_read() and memory_region_dispatch_write(). > > Since the MR we are dispatching to is owned by the same device that > owns the NS-alias MR (the TYPE_ARMV7M container object), this trips > the reentrancy-guard that is applied by access_with_adjusted_size(). > > Mark the NS alias MemoryRegions as disable_reentrancy_guard; this is > safe because v7m_sysreg_ns_read() and v7m_sysreg_ns_write() do not > touch any of the device's state. (Any further reentrancy attempts by > the underlying MR will still be caught.) > > Without this fix, an attempt to read from an address like 0xe002e010, > which is a register in the NS systick alias, will fail and provoke > > qemu-system-arm: warning: Blocked re-entrant IO on MemoryRegion: v7m_systick at addr: 0x0 > > We didn't notice this earlier because almost all code accesses > the registers and systick via the non-alias addresses; the NS > aliases are only need for the rarer case of Secure code that needs > to manage the NS timer or system state on behalf of NS code. > > Note that although the v7m_systick_ops read and write functions > also call memory_region_dispatch_{read,write}, this MR does not > need to have the reentrancy-guard disabled because the underlying > MR that it forwards to is owned by a different device (the > TYPE_SYSTICK timer device). > > Reported via a stackoverflow question: > https://stackoverflow.com/questions/79808107/what-this-error-is-even-about-qemu-system-arm-warning-blocked-re-entrant-io > > Cc: qemu-stable@nongnu.org > Signed-off-by: Peter Maydell > --- > hw/arm/armv7m.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) Reviewed-by: Philippe Mathieu-Daudé