From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: Nicholas Piggin <npiggin@gmail.com>, qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, "Cédric Le Goater" <clg@kaod.org>,
"Harsh Prateek Bora" <harshpb@linux.ibm.com>
Subject: Re: [PATCH 1/2] target/ppc: Fix icount access for some hypervisor instructions
Date: Fri, 30 Jun 2023 16:39:19 -0300 [thread overview]
Message-ID: <34f18b91-c4fd-35f7-680c-7c6473640f10@gmail.com> (raw)
In-Reply-To: <20230625103700.8992-1-npiggin@gmail.com>
On 6/25/23 07:36, Nicholas Piggin wrote:
> Several instructions and register access require icount reads and are
> missing translator_io_start().
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,
Daniel
> target/ppc/translate.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index eb278c2683..c1c3cd8767 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -1177,6 +1177,7 @@ void spr_write_hmer(DisasContext *ctx, int sprn, int gprn)
>
> void spr_write_lpcr(DisasContext *ctx, int sprn, int gprn)
> {
> + translator_io_start(&ctx->base);
> gen_helper_store_lpcr(cpu_env, cpu_gpr[gprn]);
> }
> #endif /* !defined(CONFIG_USER_ONLY) */
> @@ -4002,6 +4003,7 @@ static void gen_doze(DisasContext *ctx)
> TCGv_i32 t;
>
> CHK_HV(ctx);
> + translator_io_start(&ctx->base);
> t = tcg_constant_i32(PPC_PM_DOZE);
> gen_helper_pminsn(cpu_env, t);
> /* Stop translation, as the CPU is supposed to sleep from now */
> @@ -4017,6 +4019,7 @@ static void gen_nap(DisasContext *ctx)
> TCGv_i32 t;
>
> CHK_HV(ctx);
> + translator_io_start(&ctx->base);
> t = tcg_constant_i32(PPC_PM_NAP);
> gen_helper_pminsn(cpu_env, t);
> /* Stop translation, as the CPU is supposed to sleep from now */
> @@ -4032,6 +4035,7 @@ static void gen_stop(DisasContext *ctx)
> TCGv_i32 t;
>
> CHK_HV(ctx);
> + translator_io_start(&ctx->base);
> t = tcg_constant_i32(PPC_PM_STOP);
> gen_helper_pminsn(cpu_env, t);
> /* Stop translation, as the CPU is supposed to sleep from now */
> @@ -4047,6 +4051,7 @@ static void gen_sleep(DisasContext *ctx)
> TCGv_i32 t;
>
> CHK_HV(ctx);
> + translator_io_start(&ctx->base);
> t = tcg_constant_i32(PPC_PM_SLEEP);
> gen_helper_pminsn(cpu_env, t);
> /* Stop translation, as the CPU is supposed to sleep from now */
> @@ -4062,6 +4067,7 @@ static void gen_rvwinkle(DisasContext *ctx)
> TCGv_i32 t;
>
> CHK_HV(ctx);
> + translator_io_start(&ctx->base);
> t = tcg_constant_i32(PPC_PM_RVWINKLE);
> gen_helper_pminsn(cpu_env, t);
> /* Stop translation, as the CPU is supposed to sleep from now */
> @@ -4458,6 +4464,7 @@ static void gen_hrfid(DisasContext *ctx)
> #else
> /* Restore CPU state */
> CHK_HV(ctx);
> + translator_io_start(&ctx->base);
> gen_helper_hrfid(cpu_env);
> ctx->base.is_jmp = DISAS_EXIT;
> #endif
prev parent reply other threads:[~2023-06-30 19:39 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-25 10:36 [PATCH 1/2] target/ppc: Fix icount access for some hypervisor instructions Nicholas Piggin
2023-06-25 10:37 ` [PATCH 2/2] tests/avocado: record_replay test for ppc powernv machine Nicholas Piggin
2023-06-26 11:41 ` Cédric Le Goater
2023-06-30 19:39 ` Daniel Henrique Barboza
2023-06-26 10:14 ` [PATCH 1/2] target/ppc: Fix icount access for some hypervisor instructions Richard Henderson
2023-06-30 19:39 ` Daniel Henrique Barboza [this message]
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