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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-42cb7fb8a29sm6511463f8f.30.2025.11.20.09.20.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 Nov 2025 09:20:56 -0800 (PST) Message-ID: <350863e7-19eb-4c7e-8b33-c4f7956ead4b@linaro.org> Date: Thu, 20 Nov 2025 18:20:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 8/9] target/riscv: RISCVCPUTimeSrcIf: add register_time_change_notifier Content-Language: en-US To: Luc Michel , qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Francisco Iglesias References: <20251107102340.471141-1-luc.michel@amd.com> <20251107102340.471141-9-luc.michel@amd.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20251107102340.471141-9-luc.michel@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 7/11/25 11:23, Luc Michel wrote: > Add the register_time_change_notifier method to the RISCVCPUTimeSrcIf > interface. This method allows the time source user to register a > notifier on tick counter asynchronous modification (i.e., a modification > that is not due to the monotonic nature of the counter). This can happen > if the time source counter is writable, which is the case of the `time' > register of the ACLINT. > > Use this mechanism in time_helper.c to recompute the sstc timers > deadlines. > > Signed-off-by: Luc Michel > --- > target/riscv/cpu-qom.h | 7 +++++++ > target/riscv/cpu.h | 1 + > target/riscv/time_helper.h | 11 +++++++++++ > target/riscv/time_helper.c | 13 +++++++++++++ > 4 files changed, 32 insertions(+) > diff --git a/target/riscv/time_helper.h b/target/riscv/time_helper.h > index b51fdd96570..074b516f4ad 100644 > --- a/target/riscv/time_helper.h > +++ b/target/riscv/time_helper.h > @@ -42,6 +42,17 @@ static inline uint32_t riscv_cpu_time_src_get_tick_freq(RISCVCPUTimeSrcIf *src) > > g_assert(rctsc->get_tick_freq != NULL); > return rctsc->get_tick_freq(src); > } > > +static inline void > +riscv_cpu_time_src_register_time_change_notifier(RISCVCPUTimeSrcIf *src, > + Notifier *notifier) > +{ > + RISCVCPUTimeSrcIfClass *rctsc = RISCV_CPU_TIME_SRC_IF_GET_CLASS(src); > + > + if (rctsc->register_time_change_notifier) { > + rctsc->register_time_change_notifier(src, notifier); > + } What about some trace event to help developers? I.e.: if (!rctsc->register_time_change_notifier) { trace_riscv_cpu_time_src_register_time_change_without_notifier(); return; } rctsc->register_time_change_notifier(src, notifier); > +} Anyhow: Reviewed-by: Philippe Mathieu-Daudé