From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Gregory Price <gregory.price@memverge.com>,
Fan Ni <fan.ni@samsung.com>
Subject: [PULL 11/40] hw/mem: Use memory_region_size() in cxl_type3
Date: Fri, 19 May 2023 10:50:30 -0400 [thread overview]
Message-ID: <3521176526a901bd2a8418ce6470df0e38ca4e11.1684507742.git.mst@redhat.com> (raw)
In-Reply-To: <cover.1684507742.git.mst@redhat.com>
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Accessors prefered over direct use of int128_get64() as they
clamp out of range values. None are expected here but
cleaner to always use the accessor than mix and match.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230421160827.2227-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Gregory Price <gregory.price@memverge.com>
---
hw/mem/cxl_type3.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 1bd5963a3f..2db756851c 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -52,7 +52,7 @@ static int ct3_build_cdat_entries_for_mr(CDATSubHeader **cdat_table,
.DSMADhandle = dsmad_handle,
.flags = CDAT_DSMAS_FLAG_NV,
.DPA_base = 0,
- .DPA_length = int128_get64(mr->size),
+ .DPA_length = memory_region_size(mr),
};
/* For now, no memory side cache, plausiblish numbers */
@@ -133,7 +133,7 @@ static int ct3_build_cdat_entries_for_mr(CDATSubHeader **cdat_table,
/* Reserved - the non volatile from DSMAS matters */
.EFI_memory_type_attr = 2,
.DPA_offset = 0,
- .DPA_length = int128_get64(mr->size),
+ .DPA_length = memory_region_size(mr),
};
/* Header always at start of structure */
@@ -698,7 +698,7 @@ MemTxResult cxl_type3_read(PCIDevice *d, hwaddr host_addr, uint64_t *data,
return MEMTX_ERROR;
}
- if (dpa_offset > int128_get64(mr->size)) {
+ if (dpa_offset > memory_region_size(mr)) {
return MEMTX_ERROR;
}
@@ -721,7 +721,7 @@ MemTxResult cxl_type3_write(PCIDevice *d, hwaddr host_addr, uint64_t data,
return MEMTX_OK;
}
- if (dpa_offset > int128_get64(mr->size)) {
+ if (dpa_offset > memory_region_size(mr)) {
return MEMTX_OK;
}
return address_space_write(&ct3d->hostmem_as, dpa_offset, attrs,
--
MST
next prev parent reply other threads:[~2023-05-19 14:51 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-19 14:49 [PULL 00/40] virtio,pc,pci: fixes, features, cleanups Michael S. Tsirkin
2023-05-19 14:49 ` [PULL 01/40] vhost: fix possible wrap in SVQ descriptor ring Michael S. Tsirkin
2023-05-19 14:49 ` [PULL 02/40] hw/cxl: cdat: Fix open file not closed in ct3_load_cdat() Michael S. Tsirkin
2023-05-19 14:49 ` [PULL 03/40] hw/cxl: cdat: Fix failure to free buffer in erorr paths Michael S. Tsirkin
2023-05-19 14:49 ` [PULL 04/40] docs/cxl: fix some typos Michael S. Tsirkin
2023-05-19 14:49 ` [PULL 05/40] docs/cxl: Remove incorrect CXL type 3 size parameter Michael S. Tsirkin
2023-05-19 14:50 ` [PULL 06/40] docs/cxl: Replace unsupported AARCH64 with x86_64 Michael S. Tsirkin
2023-05-19 14:50 ` [PULL 07/40] hw/cxl: drop pointless memory_region_transaction_guards Michael S. Tsirkin
2023-05-19 14:50 ` [PULL 08/40] hw/cxl: Fix endian handling for decoder commit Michael S. Tsirkin
2023-05-19 14:50 ` [PULL 09/40] hw/cxl: Fix incorrect reset of commit and associated clearing of committed Michael S. Tsirkin
2023-05-19 14:50 ` [PULL 10/40] tests/qtest/cxl-test: whitespace, line ending cleanup Michael S. Tsirkin
2023-05-19 14:50 ` Michael S. Tsirkin [this message]
2023-05-19 14:50 ` [PULL 12/40] hw/cxl: Multi-Region CXL Type-3 Devices (Volatile and Persistent) Michael S. Tsirkin
2023-05-19 14:50 ` [PULL 13/40] ACPI: bios-tables-test.c step 2 (allowed-diff entries) Michael S. Tsirkin
2023-05-19 14:50 ` [PULL 14/40] ACPI: i386: bump to MADT to revision 3 Michael S. Tsirkin
2023-05-19 14:50 ` [PULL 15/40] ACPI: bios-tables-test.c step 5 (update expected table binaries) Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 16/40] pci: pci_add_option_rom(): improve style Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 17/40] pci: pci_add_option_rom(): refactor: use g_autofree for path variable Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 18/40] vhost-user: send SET_STATUS 0 after GET_VRING_BASE Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 19/40] hw/pci: Disable PCI_ERR_UNCOR_MASK register for machine type < 8.0 Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 20/40] virtio-mem: Default to "unplugged-inaccessible=on" with 8.1 on x86-64 Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 21/40] vhost-user: Remove acpi-specific memslot limit Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 22/40] virtio-net: not enable vq reset feature unconditionally Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 23/40] virtio-crypto: fix NULL pointer dereference in virtio_crypto_free_request Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 24/40] vhost: expose function vhost_dev_has_iommu() Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 25/40] vhost_vdpa: fix the input in trace_vhost_vdpa_listener_region_del() Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 26/40] vhost-vdpa: Add check for full 64-bit in region delete Michael S. Tsirkin
2023-05-19 14:51 ` [PULL 27/40] vhost-vdpa: Add support for vIOMMU Michael S. Tsirkin
2023-05-19 14:52 ` [PULL 28/40] hw/pci-host/i440fx: Inline sysbus_add_io() Michael S. Tsirkin
2023-05-19 14:52 ` [PULL 29/40] hw/pci-host/q35: " Michael S. Tsirkin
2023-05-19 14:52 ` [PULL 30/40] hw/i386/pc_q35: Reuse machine parameter Michael S. Tsirkin
2023-05-19 14:52 ` [PULL 31/40] hw/i386/pc_{q35,piix}: Reuse MachineClass::desc as SMB product name Michael S. Tsirkin
2023-05-19 14:52 ` [PULL 32/40] hw/i386/pc_{q35,piix}: Minimize usage of get_system_memory() Michael S. Tsirkin
2023-05-19 14:52 ` [PULL 33/40] hw/i386/pc: Initialize ram_memory variable directly Michael S. Tsirkin
2023-05-19 14:52 ` [PULL 34/40] hw/pci-host/pam: Make init_pam() usage more readable Michael S. Tsirkin
2023-05-19 14:52 ` [PULL 35/40] virtio-pci: add handling of PCI ATS and Device-TLB enable/disable Michael S. Tsirkin
2023-05-19 14:52 ` [PULL 36/40] hw/pci-bridge: make building pcie-to-pci bridge configurable Michael S. Tsirkin
2023-05-19 14:52 ` [PULL 37/40] hw/cxl: rename mailbox return code type from ret_code to CXLRetCode Michael S. Tsirkin
2023-05-19 14:52 ` [PULL 38/40] hw/cxl: Introduce cxl_device_get_timestamp() utility function Michael S. Tsirkin
2023-05-19 14:53 ` [PULL 39/40] hw/i386/pc: Create RTC controllers in south bridges Michael S. Tsirkin
2023-05-19 14:53 ` [PULL 40/40] hw/i386/pc: No need for rtc_state to be an out-parameter Michael S. Tsirkin
2023-05-20 3:34 ` [PULL 00/40] virtio,pc,pci: fixes, features, cleanups Richard Henderson
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