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[97.113.13.231]) by smtp.gmail.com with ESMTPSA id n21sm384409pjo.0.2019.06.10.13.50.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Jun 2019 13:50:03 -0700 (PDT) To: Michael Rolnik , qemu-devel@nongnu.org References: <20190606193012.37715-1-mrolnik@gmail.com> <20190606193012.37715-5-mrolnik@gmail.com> From: Richard Henderson Openpgp: preference=signencrypt Message-ID: <35b377ca-dbad-b932-5e33-c5ae63344800@linaro.org> Date: Mon, 10 Jun 2019 13:50:02 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <20190606193012.37715-5-mrolnik@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 Subject: Re: [Qemu-devel] [PATCH v21 4/7] target/avr: Add instruction translation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sarah Harris , rth@twiddle.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 6/6/19 12:30 PM, Michael Rolnik wrote: > + if ((ctx.cpc & (TARGET_PAGE_SIZE - 1)) == 0) { > + break; /* page boundary */ > + } This test isn't right, because this ended the TB if the *first* instruction was located on the page boundary. It also fails to allow for a 32-bit opcode to span 0xff - 0x101, since we did not see an instruction boundary at 0x100. Since there is no MMU, we do not have to protect against permissions changes. All we have to worry about is QEMU's code that detects self-modifying code. This requires the code for each TranslationBlocks be contained within no more than two pages. Therefore, /* Do not allow the next insn to cross into a third code page. */ if ((ctx.npc - pc_start) * 2 >= TARGET_PAGE_SIZE - 4) { break; } is the better condition. Subtracting 4 allows for the next instruction to be a 32-bit opcode. Limiting to TARGET_PAGE_SIZE allows pc_start to be located anywhere in the first code page without allowing npc to cross into a third code page. r~