From: Eric Auger <eric.auger@redhat.com>
To: Zhenzhong Duan <zhenzhong.duan@intel.com>, qemu-devel@nongnu.org
Cc: alex.williamson@redhat.com, clg@redhat.com, mst@redhat.com,
jasowang@redhat.com, peterx@redhat.com, jgg@nvidia.com,
nicolinc@nvidia.com, shameerali.kolothum.thodi@huawei.com,
joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com,
kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Eduardo Habkost <eduardo@habkost.net>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Subject: Re: [PATCH rfcv2 10/20] intel_iommu: Optimize context entry cache utilization
Date: Fri, 21 Feb 2025 11:00:05 +0100 [thread overview]
Message-ID: <35c93407-b8ab-4286-a254-c62d39222272@redhat.com> (raw)
In-Reply-To: <20250219082228.3303163-11-zhenzhong.duan@intel.com>
Hi Zhenzhong,
On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
> There are many call sites referencing context entry by calling
> vtd_as_to_context_entry() which will traverse the DMAR table.
didn't you mean vtd_dev_to_context_entry? instead
>
> In most cases we can use cached context entry in vtd_as->context_cache_entry
> except it's stale. Currently only global and domain context invalidation
> stales it.
s/states/stale
Eric
>
> So introduce a helper function vtd_as_to_context_entry() to fetch from cache
> before trying with vtd_dev_to_context_entry().
>
> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> ---
> hw/i386/intel_iommu.c | 36 +++++++++++++++++++++++-------------
> 1 file changed, 23 insertions(+), 13 deletions(-)
>
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index df5fb30bc8..7709f55be5 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -1597,6 +1597,22 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num,
> return 0;
> }
>
> +static int vtd_as_to_context_entry(VTDAddressSpace *vtd_as, VTDContextEntry *ce)
> +{
> + IntelIOMMUState *s = vtd_as->iommu_state;
> + uint8_t bus_num = pci_bus_num(vtd_as->bus);
> + uint8_t devfn = vtd_as->devfn;
> + VTDContextCacheEntry *cc_entry = &vtd_as->context_cache_entry;
> +
> + /* Try to fetch context-entry from cache first */
> + if (cc_entry->context_cache_gen == s->context_cache_gen) {
> + *ce = cc_entry->context_entry;
> + return 0;
> + } else {
> + return vtd_dev_to_context_entry(s, bus_num, devfn, ce);
> + }
> +}
> +
> static int vtd_sync_shadow_page_hook(const IOMMUTLBEvent *event,
> void *private)
> {
> @@ -1649,9 +1665,7 @@ static int vtd_address_space_sync(VTDAddressSpace *vtd_as)
> return 0;
> }
>
> - ret = vtd_dev_to_context_entry(vtd_as->iommu_state,
> - pci_bus_num(vtd_as->bus),
> - vtd_as->devfn, &ce);
> + ret = vtd_as_to_context_entry(vtd_as, &ce);
> if (ret) {
> if (ret == -VTD_FR_CONTEXT_ENTRY_P) {
> /*
> @@ -1710,8 +1724,7 @@ static bool vtd_as_pt_enabled(VTDAddressSpace *as)
> assert(as);
>
> s = as->iommu_state;
> - if (vtd_dev_to_context_entry(s, pci_bus_num(as->bus), as->devfn,
> - &ce)) {
> + if (vtd_as_to_context_entry(as, &ce)) {
> /*
> * Possibly failed to parse the context entry for some reason
> * (e.g., during init, or any guest configuration errors on
> @@ -2443,8 +2456,7 @@ static void vtd_iotlb_domain_invalidate(IntelIOMMUState *s, uint16_t domain_id)
> vtd_iommu_unlock(s);
>
> QLIST_FOREACH(vtd_as, &s->vtd_as_with_notifiers, next) {
> - if (!vtd_dev_to_context_entry(s, pci_bus_num(vtd_as->bus),
> - vtd_as->devfn, &ce) &&
> + if (!vtd_as_to_context_entry(vtd_as, &ce) &&
> domain_id == vtd_get_domain_id(s, &ce, vtd_as->pasid)) {
> vtd_address_space_sync(vtd_as);
> }
> @@ -2466,8 +2478,7 @@ static void vtd_iotlb_page_invalidate_notify(IntelIOMMUState *s,
> hwaddr size = (1 << am) * VTD_PAGE_SIZE;
>
> QLIST_FOREACH(vtd_as, &(s->vtd_as_with_notifiers), next) {
> - ret = vtd_dev_to_context_entry(s, pci_bus_num(vtd_as->bus),
> - vtd_as->devfn, &ce);
> + ret = vtd_as_to_context_entry(vtd_as, &ce);
> if (!ret && domain_id == vtd_get_domain_id(s, &ce, vtd_as->pasid)) {
> uint32_t rid2pasid = PCI_NO_PASID;
>
> @@ -2974,8 +2985,7 @@ static void vtd_piotlb_pasid_invalidate(IntelIOMMUState *s,
> vtd_iommu_unlock(s);
>
> QLIST_FOREACH(vtd_as, &s->vtd_as_with_notifiers, next) {
> - if (!vtd_dev_to_context_entry(s, pci_bus_num(vtd_as->bus),
> - vtd_as->devfn, &ce) &&
> + if (!vtd_as_to_context_entry(vtd_as, &ce) &&
> domain_id == vtd_get_domain_id(s, &ce, vtd_as->pasid)) {
> uint32_t rid2pasid = VTD_CE_GET_RID2PASID(&ce);
>
> @@ -4154,7 +4164,7 @@ static void vtd_report_ir_illegal_access(VTDAddressSpace *vtd_as,
> assert(vtd_as->pasid != PCI_NO_PASID);
>
> /* Try out best to fetch FPD, we can't do anything more */
> - if (vtd_dev_to_context_entry(s, bus_n, vtd_as->devfn, &ce) == 0) {
> + if (vtd_as_to_context_entry(vtd_as, &ce) == 0) {
> is_fpd_set = ce.lo & VTD_CONTEXT_ENTRY_FPD;
> if (!is_fpd_set && s->root_scalable) {
> vtd_ce_get_pasid_fpd(s, &ce, &is_fpd_set, vtd_as->pasid);
> @@ -4491,7 +4501,7 @@ static void vtd_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
> /* replay is protected by BQL, page walk will re-setup it safely */
> iova_tree_remove(vtd_as->iova_tree, map);
>
> - if (vtd_dev_to_context_entry(s, bus_n, vtd_as->devfn, &ce) == 0) {
> + if (vtd_as_to_context_entry(vtd_as, &ce) == 0) {
> trace_vtd_replay_ce_valid(s->root_scalable ? "scalable mode" :
> "legacy mode",
> bus_n, PCI_SLOT(vtd_as->devfn),
next prev parent reply other threads:[~2025-02-21 10:01 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-19 8:22 [PATCH rfcv2 00/20] intel_iommu: Enable stage-1 translation for passthrough device Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 01/20] backends/iommufd: Add helpers for invalidating user-managed HWPT Zhenzhong Duan
2025-02-20 16:47 ` Eric Auger
2025-02-28 2:26 ` Duan, Zhenzhong
2025-02-24 10:03 ` Shameerali Kolothum Thodi via
2025-02-28 9:36 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 02/20] vfio/iommufd: Add properties and handlers to TYPE_HOST_IOMMU_DEVICE_IOMMUFD Zhenzhong Duan
2025-02-20 17:42 ` Eric Auger
2025-02-28 5:39 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 03/20] HostIOMMUDevice: Introduce realize_late callback Zhenzhong Duan
2025-02-20 17:48 ` Eric Auger
2025-02-28 8:16 ` Duan, Zhenzhong
2025-03-06 15:53 ` Eric Auger
2025-04-07 11:19 ` Cédric Le Goater
2025-04-08 8:00 ` Cédric Le Goater
2025-04-09 8:27 ` Duan, Zhenzhong
2025-04-09 9:58 ` Cédric Le Goater
2025-02-19 8:22 ` [PATCH rfcv2 04/20] vfio/iommufd: Implement HostIOMMUDeviceClass::realize_late() handler Zhenzhong Duan
2025-02-20 18:07 ` Eric Auger
2025-02-28 8:23 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 05/20] vfio/iommufd: Implement [at|de]tach_hwpt handlers Zhenzhong Duan
2025-02-20 18:13 ` Eric Auger
2025-02-28 8:24 ` Duan, Zhenzhong
2025-03-06 15:56 ` Eric Auger
2025-02-19 8:22 ` [PATCH rfcv2 06/20] host_iommu_device: Define two new capabilities HOST_IOMMU_DEVICE_CAP_[NESTING|FS1GP] Zhenzhong Duan
2025-02-20 18:41 ` Eric Auger
2025-02-20 18:44 ` Eric Auger
2025-02-28 8:29 ` Duan, Zhenzhong
2025-03-06 15:59 ` Eric Auger
2025-03-06 19:45 ` Nicolin Chen
2025-03-10 3:48 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 07/20] iommufd: Implement query of HOST_IOMMU_DEVICE_CAP_[NESTING|FS1GP] Zhenzhong Duan
2025-02-20 19:00 ` Eric Auger
2025-02-28 8:32 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 08/20] iommufd: Implement query of HOST_IOMMU_DEVICE_CAP_ERRATA Zhenzhong Duan
2025-02-20 18:55 ` Eric Auger
2025-02-28 8:31 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 09/20] intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry Zhenzhong Duan
2025-02-21 6:39 ` CLEMENT MATHIEU--DRIF
2025-02-21 10:11 ` Eric Auger
2025-02-28 8:47 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 10/20] intel_iommu: Optimize context entry cache utilization Zhenzhong Duan
2025-02-21 10:00 ` Eric Auger [this message]
2025-02-28 8:34 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 11/20] intel_iommu: Check for compatibility with IOMMUFD backed device when x-flts=on Zhenzhong Duan
2025-02-21 12:49 ` Eric Auger
2025-02-21 14:18 ` Eric Auger
2025-02-28 8:57 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 12/20] intel_iommu: Introduce a new structure VTDHostIOMMUDevice Zhenzhong Duan
2025-02-21 13:03 ` Eric Auger
2025-02-28 8:58 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 13/20] intel_iommu: Add PASID cache management infrastructure Zhenzhong Duan
2025-02-21 17:02 ` Eric Auger
2025-02-28 9:35 ` Duan, Zhenzhong
2025-02-19 8:22 ` [PATCH rfcv2 14/20] intel_iommu: Bind/unbind guest page table to host Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 15/20] intel_iommu: ERRATA_772415 workaround Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 16/20] intel_iommu: Replay pasid binds after context cache invalidation Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 17/20] intel_iommu: Propagate PASID-based iotlb invalidation to host Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 18/20] intel_iommu: Refresh pasid bind when either SRTP or TE bit is changed Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 19/20] intel_iommu: Bypass replay in stage-1 page table mode Zhenzhong Duan
2025-02-19 8:22 ` [PATCH rfcv2 20/20] intel_iommu: Enable host device when x-flts=on in scalable mode Zhenzhong Duan
2025-02-20 19:03 ` [PATCH rfcv2 00/20] intel_iommu: Enable stage-1 translation for passthrough device Eric Auger
2025-02-21 6:08 ` Duan, Zhenzhong
2025-04-05 3:01 ` Donald Dutile
2025-05-19 8:37 ` Duan, Zhenzhong
2025-05-19 15:39 ` Donald Dutile
2025-05-20 9:13 ` Duan, Zhenzhong
2025-05-20 10:47 ` Donald Dutile
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