Re: [PATCH] tests: add (riscv virt) machine mapping to testenv

[Hanna Reitz <hreitz@redhat.com>]

On 07.03.22 15:13, laokz wrote:
> Some qemu-iotests(040 etc) use PCI disk to do test. Without the
> mapping, RISC-V flavor use spike as default machine which has no
> PCI bus, causing test failure.
>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/894
>
> Signed-off-by: laokz <laokz@foxmail.com>

Hi!

Thank you for this quick patch, it looks good to me!  I can reproduce 
the problem you reported, and this patch does resolve it.

There might be one problem, though, and that’s the Signed-off-by tag.  
The qemu project requires it to be formatted like the Linux kernel does, 
and so our docs/devel/submitting-a-patch.rst file links to 
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/SubmittingPatches?id=f6f94e2ab1b33f0082ac22d71f66385a60d8157f#n297 
.  Like the kernel, we thus require a real name to appear in the S-o-b.

I’m used to seeing names written with a capital letter, and personal 
names consisting just of a single name are rare, so that’s why I have to 
ask you – is laokz your real name, i.e. not a pseudonym?  If you say it 
is, that’ll be fine for me.

If it isn’t and you don’t wish to disclose your real name, that will be 
a bit of a problem legally, but I think in this case the patch is simple 
enough that we can probably find a way around it.

Hanna

> ---
>   tests/qemu-iotests/testenv.py | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/tests/qemu-iotests/testenv.py b/tests/qemu-iotests/testenv.py
> index 0f32897fe8..975f26a785 100644
> --- a/tests/qemu-iotests/testenv.py
> +++ b/tests/qemu-iotests/testenv.py
> @@ -238,6 +238,8 @@ def __init__(self, imgfmt: str, imgproto: str, aiomode: str,
>               ('aarch64', 'virt'),
>               ('avr', 'mega2560'),
>               ('m68k', 'virt'),
> +            ('riscv32', 'virt'),
> +            ('riscv64', 'virt'),
>               ('rx', 'gdbsim-r5f562n8'),
>               ('tricore', 'tricore_testboard')
>           )