From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Yang Zhong <yang.zhong@intel.com>, qemu-devel@nongnu.org
Cc: bonzini@gnu.org
Subject: Re: [PATCH] i386/cpu: Expose AVX_VNNI instruction to guset
Date: Tue, 6 Apr 2021 09:15:44 +0200 [thread overview]
Message-ID: <35eb247d-55be-981a-8818-16aceb84cf82@redhat.com> (raw)
In-Reply-To: <20210406015757.25718-1-yang.zhong@intel.com>
Typo "guest" in subject.
On 4/6/21 3:57 AM, Yang Zhong wrote:
> Expose AVX (VEX-encoded) versions of the Vector Neural Network
> Instructions to guest.>
> The bit definition:
> CPUID.(EAX=7,ECX=1):EAX[bit 4] AVX_VNNI
>
> The following instructions are available when this feature is
> present in the guest.
> 1. VPDPBUS: Multiply and Add Unsigned and Signed Bytes
> 2. VPDPBUSDS: Multiply and Add Unsigned and Signed Bytes with Saturation
> 3. VPDPWSSD: Multiply and Add Signed Word Integers
> 4. VPDPWSSDS: Multiply and Add Signed Integers with Saturation
>
> As for the kvm related code, please reference Linux commit id 1085a6b585d7.
>
> The release document ref below link:
> https://software.intel.com/content/www/us/en/develop/download/\
> intel-architecture-instruction-set-extensions-programming-reference.html
>
> Signed-off-by: Yang Zhong <yang.zhong@intel.com>
> ---
> target/i386/cpu.c | 4 ++--
> target/i386/cpu.h | 2 ++
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 6b3e9467f1..f0c48f06a2 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -996,7 +996,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
> .type = CPUID_FEATURE_WORD,
> .feat_names = {
> NULL, NULL, NULL, NULL,
> - NULL, "avx512-bf16", NULL, NULL,
> + "avx-vnni", "avx512-bf16", NULL, NULL,
> NULL, NULL, NULL, NULL,
> NULL, NULL, NULL, NULL,
> NULL, NULL, NULL, NULL,
> @@ -3273,7 +3273,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO |
> MSR_ARCH_CAP_PSCHANGE_MC_NO | MSR_ARCH_CAP_TAA_NO,
> .features[FEAT_7_1_EAX] =
> - CPUID_7_1_EAX_AVX512_BF16,
> + CPUID_7_1_EAX_AVX_VNNI | CPUID_7_1_EAX_AVX512_BF16,
> /*
> * Missing: XSAVES (not supported by some Linux versions,
> * including v4.1 to v4.12).
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 570f916878..edc8984448 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -804,6 +804,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
> /* Speculative Store Bypass Disable */
> #define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31)
>
> +/* AVX VNNI Instruction */
> +#define CPUID_7_1_EAX_AVX_VNNI (1U << 4)
> /* AVX512 BFloat16 Instruction */
> #define CPUID_7_1_EAX_AVX512_BF16 (1U << 5)
>
>
next prev parent reply other threads:[~2021-04-06 7:17 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-06 1:57 [PATCH] i386/cpu: Expose AVX_VNNI instruction to guset Yang Zhong
2021-04-06 7:15 ` Philippe Mathieu-Daudé [this message]
2021-04-06 7:11 ` Yang Zhong
-- strict thread matches above, loose matches on Subject: below --
2021-03-19 1:59 Yang Zhong
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