From: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
To: Sairaj Kodilkar <sarunkod@amd.com>, qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, richard.henderson@linaro.org,
eduardo@habkost.net, peterx@redhat.com, david@redhat.com,
philmd@linaro.org, mst@redhat.com, marcel.apfelbaum@gmail.com,
alex.williamson@redhat.com, vasant.hegde@amd.com,
suravee.suthikulpanit@amd.com, santosh.shukla@amd.com,
Wei.Huang2@amd.com, joao.m.martins@oracle.com,
boris.ostrovsky@oracle.com
Subject: Re: [PATCH 08/18] amd_iommu: Helper to decode size of page invalidation command
Date: Mon, 28 Apr 2025 17:16:10 -0400 [thread overview]
Message-ID: <366f3a0c-60a6-47be-8981-5c8d8be55d60@oracle.com> (raw)
In-Reply-To: <36a69911-ff85-47e4-a34d-cf5e934d85da@amd.com>
On 4/22/25 8:26 AM, Sairaj Kodilkar wrote:
>
>
> On 4/14/2025 7:32 AM, Alejandro Jimenez wrote:
>> The size of the region to invalidate depends on the S bit and address
>> encoded in the command. Add a helper to extract this information, which
>> will be used to sync shadow page tables in upcoming changes.
>>
>> Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
>> ---
>> hw/i386/amd_iommu.c | 34 ++++++++++++++++++++++++++++++++++
>> hw/i386/amd_iommu.h | 4 ++++
>> 2 files changed, 38 insertions(+)
>>
>> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
>> index 5f55be1f4d36..0af873b66a31 100644
>> --- a/hw/i386/amd_iommu.c
>> +++ b/hw/i386/amd_iommu.c
>> +static uint64_t __attribute__((unused))
>> +amdvi_decode_invalidation_size(hwaddr addr, uint16_t flags)
>> +{
>> + uint64_t size = AMDVI_PAGE_SIZE;
>> + uint8_t fzbit = 0;
>> +
>> + if (flags & AMDVI_CMD_INVAL_IOMMU_PAGES_S) {
>> + fzbit = cto64(addr | 0xFFF);
>> +
>> + if (fzbit >= 51 || !addr) {
>
> I am skeptical about the condition addr == 0 (!addr)
>
> Consider the case where user wants to invalidate 8K size page, starting
> from address 0. It'll cause address field to be 0, right ? If so, then
> we should invalidate only 8K page not the entire address range.
You are right, I'll fix the issue (i.e. remove the !addr special case)
in v2.
This was a remnant of an earlier prototype where I was decoding the
address with a different method, but as you point out this special case
is not needed anymore and would result in sub-optimal behavior.
Thank you!
Alejandro
>
> Am I missing something here ?
>
> Regards
> Sairaj
next prev parent reply other threads:[~2025-04-28 21:17 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-14 2:02 [PATCH 00/18] AMD vIOMMU: DMA remapping support for VFIO devices Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 01/18] memory: Adjust event ranges to fit within notifier boundaries Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 02/18] amd_iommu: Add helper function to extract the DTE Alejandro Jimenez
2025-04-16 11:36 ` Sairaj Kodilkar
2025-04-16 13:29 ` Alejandro Jimenez
2025-04-16 18:50 ` Michael S. Tsirkin
2025-04-16 22:37 ` Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 03/18] amd_iommu: Add support for IOMMU notifier Alejandro Jimenez
2025-04-16 12:14 ` Sairaj Kodilkar
2025-04-16 22:17 ` Alejandro Jimenez
2025-04-17 10:19 ` Sairaj Kodilkar
2025-04-17 16:21 ` Alejandro Jimenez
2025-04-17 16:34 ` Michael S. Tsirkin
2025-04-18 6:33 ` Sairaj Kodilkar
2025-04-14 2:02 ` [PATCH 04/18] amd_iommu: Unmap all address spaces under the AMD IOMMU on reset Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 05/18] amd_iommu: Toggle memory regions based on address translation mode Alejandro Jimenez
2025-04-22 12:17 ` Sairaj Kodilkar
2025-04-28 21:10 ` Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 06/18] amd_iommu: Set all address spaces to default translation mode on reset Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 07/18] amd_iommu: Return an error when unable to read PTE from guest memory Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 08/18] amd_iommu: Helper to decode size of page invalidation command Alejandro Jimenez
2025-04-22 12:26 ` Sairaj Kodilkar
2025-04-28 21:16 ` Alejandro Jimenez [this message]
2025-04-14 2:02 ` [PATCH 09/18] amd_iommu: Add helpers to walk AMD v1 Page Table format Alejandro Jimenez
2025-04-17 12:40 ` CLEMENT MATHIEU--DRIF
2025-04-17 15:27 ` Alejandro Jimenez
2025-04-18 5:30 ` CLEMENT MATHIEU--DRIF
2025-04-23 6:28 ` Sairaj Kodilkar
2025-04-14 2:02 ` [PATCH 10/18] amd_iommu: Add a page walker to sync shadow page tables on invalidation Alejandro Jimenez
2025-04-17 15:14 ` Ethan MILON
2025-04-17 15:45 ` Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 11/18] amd_iommu: Sync shadow page tables on page invalidation Alejandro Jimenez
2025-04-22 12:38 ` Sairaj Kodilkar
2025-04-22 12:38 ` Sairaj Kodilkar
2025-04-29 19:47 ` Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 12/18] amd_iommu: Add replay callback Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 13/18] amd_iommu: Invalidate address translations on INVALIDATE_IOMMU_ALL Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 14/18] amd_iommu: Toggle address translation on device table entry invalidation Alejandro Jimenez
2025-04-22 12:48 ` Sairaj Kodilkar
2025-04-29 20:45 ` Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 15/18] amd_iommu: Use iova_tree records to determine large page size on UNMAP Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 16/18] amd_iommu: Do not assume passthrough translation when DTE[TV]=0 Alejandro Jimenez
2025-04-23 6:06 ` Sairaj Kodilkar
2025-04-14 2:02 ` [PATCH 17/18] amd_iommu: Refactor amdvi_page_walk() to use common code for page walk Alejandro Jimenez
2025-04-14 2:02 ` [PATCH 18/18] amd_iommu: Do not emit I/O page fault events during replay() Alejandro Jimenez
2025-04-23 6:18 ` Sairaj Kodilkar
2025-04-23 10:45 ` [PATCH 00/18] AMD vIOMMU: DMA remapping support for VFIO devices Sairaj Kodilkar
2025-04-23 10:56 ` Sairaj Kodilkar
2025-04-24 11:49 ` Joao Martins
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