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[71.212.39.66]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73271a02648sm253682b3a.107.2025.02.15.12.06.50 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 15 Feb 2025 12:06:50 -0800 (PST) Message-ID: <3689674a-fa0a-4a9b-a447-8d706d7e3e4d@linaro.org> Date: Sat, 15 Feb 2025 12:06:48 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/6] tcg: Introduce constraint for zero register From: Richard Henderson To: qemu-devel@nongnu.org References: <20250212034617.1079324-1-richard.henderson@linaro.org> Content-Language: en-US In-Reply-To: <20250212034617.1079324-1-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 2/11/25 19:46, Richard Henderson wrote: > Based-on:20250205040341.2056361-1-richard.henderson@linaro.org > ("[PATCH 00/11] tcg: Cleanups after disallowing 64-on-32") > > Introduce a new general-purpose constraint which maps 0 > to TCG_REG_ZERO, if defined. This differs from existing > constant constraints in that const_arg[*] is recorded as > false, indicating that the value is in a register. > > This doesn't make much difference to the current tree, but as a > prelude to [1], where small output functions are categorized by > register vs immediate arguments, then this provides a way to > send a constant zero as a register argument. > > > r~ > > > [1]https://patchew.org/QEMU/20250107080112.1175095-1-richard.henderson@linaro.org/ > > Richard Henderson (6): > tcg: Introduce the 'z' constraint for a hardware zero register > tcg/aarch64: Use 'z' constraint > tcg/loongarch64: Use 'z' constraint > tcg/mips: Use 'z' constraint > tcg/riscv: Use 'z' constraint > tcg/sparc64: Use 'z' constraint Queued. r~