Re: [PATCH 2/2] i386/cpu: Mask with XCR0/XSS mask for FEAT_XSAVE_XCR0_HI and FEAT_XSAVE_XSS_HI leafs

["Yang, Weijiang" <weijiang.yang@intel.com>]

On 1/15/2024 5:13 PM, Li, Xiaoyao wrote:
> The value of FEAT_XSAVE_XCR0_HI leaf and FEAT_XSAVE_XSS_HI leaf also
> need to be masked by XCR0 and XSS mask respectively, to make it
> logically correct.
>
> Fixes: 301e90675c3f ("target/i386: Enable support for XSAVES based features")
> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
> ---
>   target/i386/cpu.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index b445e2957c4f..a5c08944a483 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -6946,9 +6946,9 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu)
>       }
>   
>       env->features[FEAT_XSAVE_XCR0_LO] = mask & CPUID_XSTATE_XCR0_MASK;
> -    env->features[FEAT_XSAVE_XCR0_HI] = mask >> 32;
> +    env->features[FEAT_XSAVE_XCR0_HI] = (mask & CPUID_XSTATE_XCR0_MASK) >> 32;
>       env->features[FEAT_XSAVE_XSS_LO] = mask & CPUID_XSTATE_XSS_MASK;
> -    env->features[FEAT_XSAVE_XSS_HI] = mask >> 32;
> +    env->features[FEAT_XSAVE_XSS_HI] = (mask & CPUID_XSTATE_XSS_MASK) >> 32;
>   }

Thanks for fixing this!
Reviewed-by: Yang Weijiang <weijiang.yang@intel.com>

>   
>   /***** Steps involved on loading and filtering CPUID data