From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>,
QEMU devel <qemu-devel@nongnu.org>
Cc: Song Gao <gaosong@loongson.cn>, Bibo Mao <maobibo@loongson.cn>,
Eric Blake <eblake@redhat.com>,
Markus Armbruster <armbru@redhat.com>,
Eduardo Habkost <eduardo@habkost.net>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Yanan Wang <wangyanan55@huawei.com>,
Zhao Liu <zhao1.liu@intel.com>,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH v2 06/23] target/loongarch: Store some uint64_t values as target_ulong
Date: Fri, 27 Dec 2024 00:02:36 +0100 [thread overview]
Message-ID: <3760c644-c5d4-4331-9d1b-059486bbd740@linaro.org> (raw)
In-Reply-To: <b31fde39-87f1-470b-86af-bb648caf6cfe@app.fastmail.com>
On 26/12/24 23:58, Jiaxun Yang wrote:
>
>
> 在2024年12月26日十二月 下午10:48，Philippe Mathieu-Daudé写道：
>> On 26/12/24 22:19, Jiaxun Yang wrote:
>>> Store internal registers including GPRs, CSRs, and LBT scratchs
>>> as target_ulong, as per architecture specification.
>>>
>>> The only exception here is tlb_misc, as it's only used by QEMU
>>> internally and need keep to be 64bit to store all required fields.
>>>
>>> There is no migration ABI change, as target_ulong is uint64_t on
>>> existing loongarch64 builds anyway.
>>
>> I'm working on a prototype series where target_ulong becomes uint64_t
>> under TCG. This patch is going the opposite direction. Not sure what
>> to say at this point (I'm not rejecting it, just wondering).
>
> Does this mean TCGv will always be 64bit?
>
> I'm doing this just to keep all TCG _tl load/store sane. If that's the
> way to go, I'm happy to adopt full uint64_t approach.
"full uint64_t approach" won't happen before months (except if we get
more manpower).
The idea is to add all current generic TCG ops but taking an extra MemOp
argument, having the backend sign-extending / truncating.
next prev parent reply other threads:[~2024-12-26 23:02 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-26 21:19 [PATCH v2 00/23] target/loongarch: LoongArch32 fixes 1 Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 01/23] target/loongarch: Enable rotr.w/rotri.w for LoongArch32 Jiaxun Yang
2024-12-26 21:24 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 02/23] target/loongarch: Fix address generation for gen_sc Jiaxun Yang
2024-12-26 21:25 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 03/23] target/loongarch: Fix PGD CSR for LoongArch32 Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 04/23] target/loongarch: Perform sign extension for IOCSR reads Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 05/23] target/loongarch: Use target_ulong for iocsrrd helper results Jiaxun Yang
2024-12-26 21:27 ` Richard Henderson
2024-12-26 22:45 ` Philippe Mathieu-Daudé
2024-12-26 21:19 ` [PATCH v2 06/23] target/loongarch: Store some uint64_t values as target_ulong Jiaxun Yang
2024-12-26 22:48 ` Philippe Mathieu-Daudé
2024-12-26 22:58 ` Jiaxun Yang
2024-12-26 23:02 ` Philippe Mathieu-Daudé [this message]
2024-12-26 21:19 ` [PATCH v2 07/23] target/loongarch: Cast address to 64bit before DMW_64_VSEG shift Jiaxun Yang
2024-12-26 21:28 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 08/23] target/loongarch: Fix some modifiers for log formatting Jiaxun Yang
2024-12-26 21:29 ` Richard Henderson
2024-12-26 22:49 ` Philippe Mathieu-Daudé
2024-12-26 21:19 ` [PATCH v2 09/23] target/loongarch: Use target_ulong for CSR helpers Jiaxun Yang
2024-12-26 21:31 ` Richard Henderson
2024-12-26 21:39 ` Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 10/23] target/loongarch: Scrutinise TCG float translation for 32 bit build Jiaxun Yang
2024-12-26 22:11 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 11/23] target/loongarch: Scrutinise TCG vector " Jiaxun Yang
2024-12-26 22:25 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 12/23] target/loongarch: Scrutinise TCG bitops " Jiaxun Yang
2024-12-26 21:55 ` Richard Henderson
2024-12-26 22:08 ` Jiaxun Yang
2024-12-26 22:10 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 13/23] target/loongarch: Fix rdtimer on 32bit build Jiaxun Yang
2024-12-26 22:16 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 14/23] target/loongarch: Scrutinise TCG arithmetic translation for 32 bit build Jiaxun Yang
2024-12-26 22:05 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 15/23] target/loongarch: Fix load type for gen_ll Jiaxun Yang
2024-12-26 22:05 ` Richard Henderson
2024-12-26 21:19 ` [PATCH v2 16/23] target/loongarch: Define address space information for LoongArch32 Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 17/23] target/loongarch: Refactoring is_la64/is_va32 " Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 18/23] target/loongarch: ifdef out 64 bit CPUs on 32 bit builds Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 19/23] target/loongarch: Introduce max32 CPU type Jiaxun Yang
2024-12-26 22:55 ` Philippe Mathieu-Daudé
2024-12-26 23:00 ` Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 20/23] hw/loongarch/virt: Default to max32 CPU for LoongArch 32 build Jiaxun Yang
2024-12-26 22:56 ` Philippe Mathieu-Daudé
2024-12-26 23:03 ` Jiaxun Yang
2024-12-26 23:20 ` Philippe Mathieu-Daudé
2024-12-26 21:19 ` [PATCH v2 21/23] qapi/machine: Replace TARGET_LOONGARCH64 with TARGET_LOONGARCH Jiaxun Yang
2025-01-07 11:06 ` Markus Armbruster
2024-12-26 21:19 ` [PATCH v2 22/23] target/loongarch: Wire up LoongArch32 Kconfigs Jiaxun Yang
2024-12-26 21:19 ` [PATCH v2 23/23] config: Add loongarch32-softmmu target Jiaxun Yang
2024-12-26 22:58 ` Philippe Mathieu-Daudé
2024-12-27 5:20 ` Richard Henderson
2024-12-27 10:48 ` Jiaxun Yang
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