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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id fa24sm63791pjb.13.2019.10.02.12.34.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Oct 2019 12:34:03 -0700 (PDT) Subject: Re: [PATCH v2] s390x/tcg: MVCL: Exit to main loop if requested From: Richard Henderson To: =?UTF-8?Q?Alex_Benn=c3=a9e?= , qemu-devel@nongnu.org References: <20191002082636.7739-1-david@redhat.com> <87zhijjwph.fsf@linaro.org> <0479ad1f-348e-ed40-c2c6-aef168afdb7e@linaro.org> Openpgp: preference=signencrypt Message-ID: <379c2065-adfe-0847-46f3-7f25c7650df9@linaro.org> Date: Wed, 2 Oct 2019 12:34:01 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <0479ad1f-348e-ed40-c2c6-aef168afdb7e@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/2/19 9:47 AM, Richard Henderson wrote: > There is still the special case of EXECUTE of MVCL, which I suspect must have > some failure mode that we're not considering -- the setting and clearing of > ex_value can't help. I have a suspicion that we need to special case that > within helper_ex, just so that ex_value doesn't enter into it. I had a walk and a think. I now believe that we're ok: (1) TB with EXECUTE runs, at address Ae - env->psw_addr stored with Ae. - helper_ex() runs, memory address Am computed from D2a(X2a,B2a) or from psw.addr+RI2. - env->ex_value stored with memory value modified by R1a (2) TB of executee runs, - env->ex_value stored with 0. - helper_mvcl() runs, using and updating R1b, R1b+1, R2b, R2b+1. (3a) helper_mvcl() completes, - TB of executee continues, psw.addr += ilen. - Next instruction is the one following EXECUTE. (3b) helper_mvcl() exits to main loop, - cpu_loop_exit_restore() unwinds psw.addr = Ae. - Next instruction is the EXECUTE itself... - goto 1. If we can agree that the result is undefined if registers R1a, X2a, B2a overlap R1b, R1b+1, R2b, R2b+1, or if the memory address Am is modified by the interrupted MVCL, then we're ok. r~