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[93.51.222.138]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-61cfc4e4d77sm12023601a12.37.2025.09.03.05.56.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 03 Sep 2025 05:56:23 -0700 (PDT) Message-ID: <37a1af69-0850-4b2f-b2bd-a9c99de3d68d@linaro.org> Date: Wed, 3 Sep 2025 14:56:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 12/12] target/loongarch: Only flush one TLB entry in helper_invtlb_page_asid() To: Bibo Mao , Song Gao , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= Cc: Jiaxun Yang , qemu-devel@nongnu.org References: <20250903084827.3085911-1-maobibo@loongson.cn> <20250903085401.3086110-1-maobibo@loongson.cn> From: Richard Henderson Content-Language: en-US In-Reply-To: <20250903085401.3086110-1-maobibo@loongson.cn> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=richard.henderson@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 9/3/25 10:54, Bibo Mao wrote: > With function helper_invtlb_page_asid(), only one TLB entry in > LoongArch emulated TLB is invalidated. so with QEMU TLB, it is not > necessary to flush all QEMU TLB, only flush address range specified > LoongArch emulated TLB is ok. Here invalidate_tlb_entry() is called > so that only QEMU TLB entry with specified address range is flushed. > > Signed-off-by: Bibo Mao > --- > target/loongarch/tcg/tlb_helper.c | 5 +---- > 1 file changed, 1 insertion(+), 4 deletions(-) Reviewed-by: Richard Henderson r~ > > diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_helper.c > index 017c0d2f5b..de0bbbb6b1 100644 > --- a/target/loongarch/tcg/tlb_helper.c > +++ b/target/loongarch/tcg/tlb_helper.c > @@ -541,7 +541,6 @@ void helper_invtlb_page_asid(CPULoongArchState *env, target_ulong info, > target_ulong addr) > { > int index, asid = info & 0x3ff; > - LoongArchTLB *tlb; > tlb_match func; > bool ret; > > @@ -551,9 +550,7 @@ void helper_invtlb_page_asid(CPULoongArchState *env, target_ulong info, > return; > } > > - tlb = &env->tlb[index]; > - tlb->tlb_misc = FIELD_DP64(tlb->tlb_misc, TLB_MISC, E, 0); > - tlb_flush(env_cpu(env)); > + invalidate_tlb(env, index); > } > > void helper_invtlb_page_asid_or_g(CPULoongArchState *env,