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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id p38sm7273553pjp.27.2019.12.04.11.47.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 Dec 2019 11:47:09 -0800 (PST) Subject: Re: [PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE To: =?UTF-8?Q?Alex_Benn=c3=a9e?= References: <20191203022937.1474-1-richard.henderson@linaro.org> <20191203022937.1474-27-richard.henderson@linaro.org> <87tv6f7w9u.fsf@linaro.org> From: Richard Henderson Message-ID: <37abfbf0-be00-db96-fbf5-b6d6ea7bb237@linaro.org> Date: Wed, 4 Dec 2019 11:47:06 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.1 MIME-Version: 1.0 In-Reply-To: <87tv6f7w9u.fsf@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::642 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/4/19 10:58 AM, Alex Bennée wrote: >> @@ -7437,13 +7437,10 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu, >> mask = PL0_RW; >> break; >> case 4: >> + case 5: >> /* min_EL EL2 */ >> mask = PL2_RW; >> break; >> - case 5: >> - /* unallocated encoding, so not possible */ >> - assert(false); >> - break; > > This change is fine - I don't think we should have asserted here anyway. > But don't we generate an unallocated exception if the CPU is v8.0? This change is only for validation of the system registers themselves. It has nothing to do with the usage of system registers from the actual guest. r~