From: Alistair Francis <alistair.francis@xilinx.com>
To: qemu-devel@nongnu.org
Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org,
alistair.francis@xilinx.com, crosthwaitepeter@gmail.com,
edgar.iglesias@gmail.com, afaerber@suse.de
Subject: [Qemu-devel] [PATCH v1 07/15] bitops: Add ONES macro
Date: Wed, 29 Jul 2015 13:24:51 -0700 [thread overview]
Message-ID: <38fc8985bc7b7ec6316f3528104080e2d00a5cc5.1438200827.git.alistair.francis@xilinx.com> (raw)
In-Reply-To: <cover.1438200827.git.alistair.francis@xilinx.com>
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Little macro that just gives you N ones (justified to LSB).
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---
include/qemu/bitops.h | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index 8164225..27bf98d 100644
--- a/include/qemu/bitops.h
+++ b/include/qemu/bitops.h
@@ -430,4 +430,6 @@ static inline uint64_t deposit64(uint64_t value, int start, int length,
return (value & ~mask) | ((fieldval << start) & mask);
}
+#define ONES(num) ((num) == 64 ? ~0ull : (1ull << (num)) - 1)
+
#endif
--
1.7.1
next prev parent reply other threads:[~2015-07-29 20:25 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-29 20:24 [Qemu-devel] [PATCH v1 00/15] data-driven device registers Alistair Francis
2015-07-29 20:24 ` [Qemu-devel] [PATCH v1 01/15] register: Add Register API Alistair Francis
2015-07-29 20:24 ` [Qemu-devel] [PATCH v1 02/15] register: Add Memory API glue Alistair Francis
2015-07-29 20:24 ` [Qemu-devel] [PATCH v1 03/15] register: Add support for decoding information Alistair Francis
2015-07-29 20:24 ` [Qemu-devel] [PATCH v1 04/15] register: Define REG and FIELD macros Alistair Francis
2015-07-29 20:24 ` [Qemu-devel] [PATCH v1 05/15] register: QOMify Alistair Francis
2015-07-29 20:24 ` [Qemu-devel] [PATCH v1 06/15] register: Add block initialise helper Alistair Francis
2015-07-29 20:24 ` Alistair Francis [this message]
2015-07-29 20:24 ` [Qemu-devel] [PATCH v1 08/15] dma: Add Xilinx Zynq devcfg device model Alistair Francis
2015-07-29 20:24 ` [Qemu-devel] [PATCH v1 09/15] xilinx_zynq: add devcfg to machine model Alistair Francis
2015-07-29 20:24 ` [Qemu-devel] [PATCH v1 10/15] qdev: Define qdev_get_gpio_out Alistair Francis
2015-07-29 20:25 ` [Qemu-devel] [PATCH v1 11/15] qdev: Add qdev_pass_all_gpios API Alistair Francis
2015-07-29 20:25 ` [Qemu-devel] [PATCH v1 12/15] irq: Add opaque setter routine Alistair Francis
2015-07-29 20:25 ` [Qemu-devel] [PATCH v1 13/15] register: Add GPIO API Alistair Francis
2015-07-29 20:25 ` [Qemu-devel] [PATCH v1 14/15] misc: Introduce ZynqMP IOU SLCR Alistair Francis
2015-07-29 20:25 ` [Qemu-devel] [PATCH v1 15/15] xlnx-zynqmp: Connect the " Alistair Francis
2015-08-27 21:47 ` [Qemu-devel] [PATCH v1 00/15] data-driven device registers Alistair Francis
2015-10-14 18:42 ` Alistair Francis
2015-10-30 6:52 ` Peter Crosthwaite
2015-10-30 8:06 ` Peter Maydell
2015-12-15 19:46 ` Peter Maydell
2015-12-15 20:52 ` Peter Crosthwaite
2015-12-15 21:56 ` Peter Maydell
2015-12-16 16:33 ` Alistair Francis
2016-01-08 0:39 ` Alistair Francis
2016-01-08 10:40 ` Peter Maydell
2016-01-08 11:05 ` Edgar E. Iglesias
2016-01-19 19:51 ` Alistair Francis
2016-01-19 21:35 ` Edgar E. Iglesias
2016-01-28 16:31 ` Frederic Konrad
2016-01-28 16:34 ` Peter Maydell
2016-01-30 0:56 ` Alistair Francis
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