From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by monty-python.gnu.org with tmda-scanned (Exim 4.20) id 19ZABH-0001T2-8F for qemu-devel@nongnu.org; Sun, 06 Jul 2003 10:07:55 -0400 Received: from mail by monty-python.gnu.org with spam-scanned (Exim 4.20) id 19ZAB6-00019A-3F for qemu-devel@nongnu.org; Sun, 06 Jul 2003 10:07:46 -0400 Received: from smtp5.wanadoo.fr ([193.252.22.27] helo=mwinf0404.wanadoo.fr) by monty-python.gnu.org with esmtp (Exim 4.20) id 19ZAAv-0000yQ-Km for qemu-devel@nongnu.org; Sun, 06 Jul 2003 10:07:33 -0400 Message-ID: <3F082D4D.6010505@free.fr> Date: Sun, 06 Jul 2003 16:08:13 +0200 From: Fabrice Bellard MIME-Version: 1.0 References: <20030706024105.956152C0E0@lists.samba.org> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH] Snapshot block device support Reply-To: qemu-devel@nongnu.org List-Id: List-Help: List-Post: List-Subscribe: , List-Archive: List-Unsubscribe: , To: Rusty Russell Cc: qemu-devel@nongnu.org Rusty Russell wrote: > In message <3F05946D.3060102@free.fr> you write: > >>I tested with 2.5.74 and fixed the initial IDE error. I also added the >>emulation of the PC 'reset' pin so that vl can be shut down as a normal >>Linux system (only hard reset is supported, not power off, as it would >>require a more complicated real mode APM bios emulation). > > > I know someone who might be interested: I'll ask tomorrow. OK. >>Now I am looking for potential original uses of vl/QEMU ! > > > Hmm, what are the chances of SMP? You mentioned something about it > probing addresses you couldn't map, perhaps another job for > CONFIG_QEMU inside the kernel, or is it too invasive? > > Even with only one CPU, it helps my debugging to be able to test > CONFIG_SMP=y... I realize that SMP simulation can be interesting. I could at least learn how it works as I never looked at it. The simplest solution would be to use CONFIG_QEMU to change the FIXADDR_TOP address in fixmap.h (I am going to test that). I have looked at APIC and IOAPIC simulation in bochs and it does not seem so complicated. My real problem is how to simulate several CPUs at the same time. A solution is to use a single process and to schedule by hand. It is costly because the address space must be switched between each CPU. Another solution is to use separate processes, but it complicates the hardware simulation. Any ideas ? Fabrice.