From: WANG Xuerui <i.qemu@xen0n.name>
To: "Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
XiaoJuan Yang <yangxiaojuan@loongson.cn>,
Song Gao <gaosong@loongson.cn>,
Laurent Vivier <laurent@vivier.eu>
Subject: Re: [PATCH v6 26/30] tcg/loongarch64: Implement tcg_target_init
Date: Thu, 30 Sep 2021 01:00:10 +0800 [thread overview]
Message-ID: <3a225730-0cc1-750e-4952-63d3d027eca1@xen0n.name> (raw)
In-Reply-To: <f05efe32-0c0e-cece-54e5-5ea059f4717e@linaro.org>
Hi Richard,
On 9/27/21 07:07, Richard Henderson wrote:
> On 9/26/21 3:15 AM, Philippe Mathieu-Daudé wrote:
>> On 9/25/21 19:30, WANG Xuerui wrote:
>>> Signed-off-by: WANG Xuerui <git@xen0n.name>
>>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>>> ---
>>> tcg/loongarch64/tcg-target.c.inc | 27 +++++++++++++++++++++++++++
>>> 1 file changed, 27 insertions(+)
>>
>>> +static void tcg_target_init(TCGContext *s)
>>> +{
>>> + tcg_target_available_regs[TCG_TYPE_I32] = ALL_GENERAL_REGS;
>>> + tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS;
>>> +
>>> + tcg_target_call_clobber_regs = ALL_GENERAL_REGS;
>>
>> If you plan to add support for vector registers later, I think it is
>> safer to start today with:
>>
>> tcg_target_call_clobber_regs = -1ull;
>
> It is not "safer", it is wrong -- there are bits set for which there
> are no registers.
>
It seems this patch doesn't need touching after all, and the whole
series have been reviewed by now; do I need to send a final revision
with all tags collected? Or is this series just waiting for next queue
chance / merge window? I'm not quite sure about the QEMU workflow so I'm
asking here, apologizes if I'm pinging this too early (maybe I really
should wait for another 3 or 4 days before asking this).
>
> r~
next prev parent reply other threads:[~2021-09-29 17:02 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-25 17:30 [PATCH v6 00/30] LoongArch64 port of QEMU TCG WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 01/30] elf: Add machine type value for LoongArch WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 02/30] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 03/30] tcg/loongarch64: Add the tcg-target.h file WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 05/30] tcg/loongarch64: Add register names, allocation order and input/output sets WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 06/30] tcg/loongarch64: Define the operand constraints WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 07/30] tcg/loongarch64: Implement necessary relocation operations WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 08/30] tcg/loongarch64: Implement the memory barrier op WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi WANG Xuerui
2021-09-26 6:48 ` Philippe Mathieu-Daudé
2021-09-25 17:30 ` [PATCH v6 10/30] tcg/loongarch64: Implement goto_ptr WANG Xuerui
2021-09-29 17:13 ` Philippe Mathieu-Daudé
2021-09-25 17:30 ` [PATCH v6 11/30] tcg/loongarch64: Implement sign-/zero-extension ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 12/30] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 13/30] tcg/loongarch64: Implement deposit/extract ops WANG Xuerui
2021-09-29 17:14 ` Philippe Mathieu-Daudé
2021-09-25 17:30 ` [PATCH v6 14/30] tcg/loongarch64: Implement bswap{16,32,64} ops WANG Xuerui
2021-09-26 6:50 ` Philippe Mathieu-Daudé
2021-09-25 17:30 ` [PATCH v6 15/30] tcg/loongarch64: Implement clz/ctz ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 17/30] tcg/loongarch64: Implement add/sub ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 18/30] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 19/30] tcg/loongarch64: Implement br/brcond ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 20/30] tcg/loongarch64: Implement setcond ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 21/30] tcg/loongarch64: Implement tcg_out_call WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 22/30] tcg/loongarch64: Implement simple load/store ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 24/30] tcg/loongarch64: Implement tcg_target_qemu_prologue WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 25/30] tcg/loongarch64: Implement exit_tb/goto_tb WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 26/30] tcg/loongarch64: Implement tcg_target_init WANG Xuerui
2021-09-26 7:15 ` Philippe Mathieu-Daudé
2021-09-26 23:07 ` Richard Henderson
2021-09-29 17:00 ` WANG Xuerui [this message]
2021-09-29 17:11 ` Philippe Mathieu-Daudé
2021-09-25 17:30 ` [PATCH v6 27/30] tcg/loongarch64: Register the JIT WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 28/30] linux-user: Add safe syscall handling for loongarch64 hosts WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 29/30] accel/tcg/user-exec: Implement CPU-specific signal handler " WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 30/30] configure, meson.build: Mark support " WANG Xuerui
2021-09-26 7:17 ` Philippe Mathieu-Daudé
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