From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-stable@nongnu.org
Subject: Re: [PATCH] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics
Date: Fri, 2 Jun 2023 21:57:13 +0200 [thread overview]
Message-ID: <3a83c3a9-1fbb-d5e3-471f-0daa02d877eb@linaro.org> (raw)
In-Reply-To: <20230602142219.1999756-1-peter.maydell@linaro.org>
On 2/6/23 16:22, Peter Maydell wrote:
> The atomic memory operations are supposed to return the old memory
> data value in the destination register. This value is not
> sign-extended, even if the operation is the signed minimum or
> maximum. (In the pseudocode for the instructions the returned data
> value is passed to ZeroExtend() to create the value in the register.)
>
> We got this wrong because we were doing a 32-to-64 zero extend on the
> result for 8 and 16 bit data values, rather than the correct amount
> of zero extension.
>
> Fix the bug by using ext8u and ext16u for the MO_8 and MO_16 data
> sizes rather than ext32u.
>
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> target/arm/tcg/translate-a64.c | 18 ++++++++++++++++--
> 1 file changed, 16 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2023-06-02 19:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-02 14:22 [PATCH] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics Peter Maydell
2023-06-02 19:57 ` Philippe Mathieu-Daudé [this message]
2023-06-03 3:36 ` Richard Henderson
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