From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Subject: [Qemu-devel] [PATCH arm-devs v1 09/15] xilinx_spips: Implement automatic CS
Date: Wed, 3 Apr 2013 14:33:01 +1000 [thread overview]
Message-ID: <3a9614850955438c5eb045d19ef18f788a54d6bc.1364962908.git.peter.crosthwaite@xilinx.com> (raw)
In-Reply-To: <475b23a3c56ec5ee1a8652f33e0a12d0bb4ac7f6.1364962908.git.peter.crosthwaite@xilinx.com>
In-Reply-To: <cover.1364962908.git.peter.crosthwaite@xilinx.com>
Implement the automatic CS control feature. If the MANUAL_CS bit is
cleared then the chip select stay de-asserted as long as the tx FIFO
is empty.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---
hw/xilinx_spips.c | 12 +++++++++---
1 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/hw/xilinx_spips.c b/hw/xilinx_spips.c
index f7d942e..16c2e1d 100644
--- a/hw/xilinx_spips.c
+++ b/hw/xilinx_spips.c
@@ -177,6 +177,12 @@ static inline int num_effective_busses(XilinxSPIPS *s)
s->regs[R_LQSPI_CFG] & LQSPI_CFG_TWO_MEM) ? s->num_busses : 1;
}
+static inline bool xilinx_spips_cs_is_set(XilinxSPIPS *s, int i, int field)
+{
+ return ~field & (1 << i) && (s->regs[R_CONFIG] & MANUAL_CS
+ || !fifo8_is_empty(&s->tx_fifo));
+}
+
static void xilinx_spips_update_cs_lines(XilinxSPIPS *s)
{
int i, j;
@@ -189,14 +195,14 @@ static void xilinx_spips_update_cs_lines(XilinxSPIPS *s)
int cs_to_set = (j * s->num_cs + i + upage) %
(s->num_cs * s->num_busses);
- if (~field & (1 << i) && !found) {
+ if (xilinx_spips_cs_is_set(s, i, field) && !found) {
DB_PRINT("selecting slave %d\n", i);
qemu_set_irq(s->cs_lines[cs_to_set], 0);
} else {
qemu_set_irq(s->cs_lines[cs_to_set], 1);
}
}
- if (~field & (1 << i)) {
+ if (xilinx_spips_cs_is_set(s, i, field)) {
found = true;
}
}
@@ -487,7 +493,7 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int size)
fifo8_reset(&s->rx_fifo);
s->regs[R_CONFIG] &= ~CS;
- s->regs[R_CONFIG] |= (~(1 << slave) << CS_SHIFT) & CS;
+ s->regs[R_CONFIG] |= ((~(1 << slave) << CS_SHIFT) & CS) | MANUAL_CS;
xilinx_spips_update_cs_lines(s);
/* instruction */
--
1.7.0.4
next prev parent reply other threads:[~2013-04-03 4:36 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-03 4:27 [Qemu-devel] [PATCH arm-devs v1 00/15] Xilinx SPIPS fixes round 2 Peter Crosthwaite
2013-04-03 4:27 ` [Qemu-devel] [PATCH arm-devs v1 01/15] xilinx_spips: seperate SPI and QSPI as two classes Peter Crosthwaite
2013-04-03 4:27 ` [Qemu-devel] [PATCH arm-devs v1 02/15] xilinx_spips: Make interrupts clear on read Peter Crosthwaite
2013-04-03 4:27 ` [Qemu-devel] [PATCH arm-devs v1 03/15] xilinx_spips: Inhibit interrupts in LQSPI mode Peter Crosthwaite
2013-04-05 18:41 ` Peter Maydell
2013-04-07 22:52 ` Peter Crosthwaite
2013-04-03 4:32 ` [Qemu-devel] [PATCH arm-devs v1 04/15] xilinx_spips: Add verbose LQSPI debug output Peter Crosthwaite
2013-04-05 18:42 ` Peter Maydell
2013-04-07 22:54 ` Peter Crosthwaite
2013-04-03 4:32 ` [Qemu-devel] [PATCH arm-devs v1 05/15] xilinx_spips: lqspi: Dont trash config register Peter Crosthwaite
2013-04-05 18:46 ` Peter Maydell
2013-04-08 7:26 ` Peter Crosthwaite
2013-04-03 4:32 ` [Qemu-devel] [PATCH arm-devs v1 06/15] xilinx_spips: Fix QSPI FIFO size Peter Crosthwaite
2013-04-05 18:50 ` Peter Maydell
2013-04-08 8:07 ` Peter Crosthwaite
2013-04-03 4:32 ` [Qemu-devel] [PATCH arm-devs v1 07/15] xilinx_spips: Trash LQ page cache on mode change Peter Crosthwaite
2013-04-05 18:53 ` Peter Maydell
2013-04-08 8:19 ` Peter Crosthwaite
2013-04-03 4:33 ` [Qemu-devel] [PATCH arm-devs v1 08/15] xilinx_spips: Add automatic start support Peter Crosthwaite
2013-04-03 4:33 ` Peter Crosthwaite [this message]
2013-04-03 4:33 ` [Qemu-devel] [PATCH arm-devs v1 10/15] xilinx_spips: Fix CTRL register RW bits Peter Crosthwaite
2013-04-05 18:57 ` Peter Maydell
2013-04-09 2:23 ` Peter Crosthwaite
2013-04-03 4:33 ` [Qemu-devel] [PATCH arm-devs v1 11/15] xilinx_spips: Fix striping behaviour Peter Crosthwaite
2013-04-05 18:59 ` Peter Maydell
2013-04-08 8:21 ` Peter Crosthwaite
2013-04-03 4:33 ` [Qemu-devel] [PATCH arm-devs v1 12/15] xilinx_spips: Debug msgs for Snoop state Peter Crosthwaite
2013-04-03 4:33 ` [Qemu-devel] [PATCH arm-devs v1 13/15] xilinx_spips: Multiple debug verbosity levels Peter Crosthwaite
2013-04-03 4:33 ` [Qemu-devel] [PATCH arm-devs v1 14/15] xilinx_spips: lqspi: Push more data to tx-fifo Peter Crosthwaite
2013-04-03 4:33 ` [Qemu-devel] [PATCH arm-devs v1 15/15] xilinx_spips: lqspi: Fix byte/misaligned access Peter Crosthwaite
2013-04-05 19:01 ` Peter Maydell
2013-04-08 8:23 ` Peter Crosthwaite
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3a9614850955438c5eb045d19ef18f788a54d6bc.1364962908.git.peter.crosthwaite@xilinx.com \
--to=peter.crosthwaite@xilinx.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).