Re: [Qemu-devel] [PATCH v1 17/23] s390x/tcg: Implement VECTOR FP PERFORM SIGN OPERATION

[Richard Henderson <richard.henderson@linaro.org>]

On 5/31/19 5:44 AM, David Hildenbrand wrote:
> +static DisasJumpType op_vfpso(DisasContext *s, DisasOps *o)
> +{
> +    const uint8_t fpf = get_field(s->fields, m3);
> +    const uint8_t m4 = get_field(s->fields, m4);
> +    const uint8_t m5 = get_field(s->fields, m5);
> +    const bool se = extract32(m4, 3, 1);
> +    TCGv_i64 tmp;
> +    int i;
> +
> +    if (fpf != FPF_LONG || extract32(m4, 0, 3) || m5 > 2) {
> +        gen_program_exception(s, PGM_SPECIFICATION);
> +        return DISAS_NORETURN;
> +    }
> +
> +    tmp = tcg_temp_new_i64();
> +    for (i = 0; i < 2; i++) {
> +        read_vec_element_i64(tmp, get_field(s->fields, v2), i, ES_64);
> +
> +        switch (m5) {
> +        case 0:
> +            /* sign bit is inverted (complement) */
> +            tcg_gen_xori_i64(tmp, tmp, 1ull << 63);
> +            break;
> +        case 1:
> +            /* sign bit is set to one (negative) */
> +            tcg_gen_ori_i64(tmp, tmp, 1ull << 63);
> +            break;
> +        case 2:
> +            /* sign bit is set to zero (positive) */
> +            tcg_gen_andi_i64(tmp, tmp, (1ull << 63) - 1);
> +            break;
> +        }
> +
> +        write_vec_element_i64(tmp, get_field(s->fields, v1), i, ES_64);
> +        if (se) {
> +            break;
> +        }
> +    }
> +    tcg_temp_free_i64(tmp);
> +    return DISAS_NEXT;
> +}

Better to use tcg_gen_gvec_{and,xor,or}i to do all of the elements at once.
Won't work for FPF_EXTENDED, but much better for FPF_SINGLE, once they're
supported.


r~