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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-453646fd642sm23809385e9.21.2025.06.20.05.46.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 20 Jun 2025 05:46:59 -0700 (PDT) Message-ID: <3babbbd5-23e3-4b6b-9f9c-e879d4ddb125@redhat.com> Date: Fri, 20 Jun 2025 14:46:55 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 09/19] intel_iommu: Introduce two helpers vtd_as_from/to_iommu_pasid_locked Content-Language: en-US To: Zhenzhong Duan , qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, mst@redhat.com, jasowang@redhat.com, peterx@redhat.com, ddutile@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, shameerali.kolothum.thodi@huawei.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum References: <20250620071813.55571-1-zhenzhong.duan@intel.com> <20250620071813.55571-10-zhenzhong.duan@intel.com> From: Eric Auger In-Reply-To: <20250620071813.55571-10-zhenzhong.duan@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -39 X-Spam_score: -4.0 X-Spam_bar: ---- X-Spam_report: (-4.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.897, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Zhenzhong, On 6/20/25 9:18 AM, Zhenzhong Duan wrote: > PCI device supports two request types, Requests-without-PASID and > Requests-with-PASID. Requests-without-PASID doesn't include a PASID TLP > prefix, IOMMU fetches rid_pasid from context entry and use it as IOMMU's > pasid to index pasid table. > > So we need to translate between PCI's pasid and IOMMU's pasid specially > for Requests-without-PASID, e.g., PCI_NO_PASID(-1) <-> rid_pasid. > For Requests-with-PASID, PCI's pasid and IOMMU's pasid are same value. > > vtd_as_from_iommu_pasid_locked() translates from BDF+iommu_pasid to vtd_as > which contains PCI's pasid vtd_as->pasid. > > vtd_as_to_iommu_pasid_locked() translates from BDF+vtd_as->pasid to iommu_pasid. > > Signed-off-by: Zhenzhong Duan > --- > hw/i386/intel_iommu.c | 58 +++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 58 insertions(+) > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index 9d4adc9458..8948b8370f 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -1602,6 +1602,64 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num, > return 0; > } > > +static inline int vtd_as_to_iommu_pasid_locked(VTDAddressSpace *vtd_as, > + uint32_t *pasid) Is it meaningful to use inline here and below? Below I guess you do so to avoid "defined but not used" compilation error but I don't think it should stay as is. I don't really understand the iommu_pasid terminology. Either it is a pasid passed through the PCI transaction or it is the default pasid found in rid2passid ce field. So that's a pasid both ways ;-) can't you simply call it pasid. > +{ > + VTDContextCacheEntry *cc_entry = &vtd_as->context_cache_entry; > + IntelIOMMUState *s = vtd_as->iommu_state; > + uint8_t bus_num = pci_bus_num(vtd_as->bus); > + uint8_t devfn = vtd_as->devfn; > + VTDContextEntry ce; > + int ret; > + > + if (cc_entry->context_cache_gen == s->context_cache_gen) { > + ce = cc_entry->context_entry; > + } else { > + ret = vtd_dev_to_context_entry(s, bus_num, devfn, &ce); > + if (ret) { > + return ret; > + } > + } if the above pattern is used at many locations I still think it may be valuable to have a _locked helper. > + > + /* Translate to iommu pasid if PCI_NO_PASID */ > + if (vtd_as->pasid == PCI_NO_PASID) { > + *pasid = VTD_CE_GET_RID2PASID(&ce); > + } else { > + *pasid = vtd_as->pasid; > + } > + > + return 0; > +} > + > +static gboolean vtd_find_as_by_sid_and_iommu_pasid(gpointer key, gpointer value, > + gpointer user_data) > +{ > + VTDAddressSpace *vtd_as = (VTDAddressSpace *)value; > + struct vtd_as_raw_key *target = (struct vtd_as_raw_key *)user_data; why target? can't you name it key instead? > + uint16_t sid = PCI_BUILD_BDF(pci_bus_num(vtd_as->bus), vtd_as->devfn); > + uint32_t pasid; > + > + if (vtd_as_to_iommu_pasid_locked(vtd_as, &pasid)) { > + return false; > + } > + > + return (pasid == target->pasid) && (sid == target->sid); > +} > + > +/* Translate iommu pasid to vtd_as */ same here > +static inline > +VTDAddressSpace *vtd_as_from_iommu_pasid_locked(IntelIOMMUState *s, > + uint16_t sid, uint32_t pasid) > +{ > + struct vtd_as_raw_key key = { > + .sid = sid, > + .pasid = pasid > + }; > + > + return g_hash_table_find(s->vtd_address_spaces, > + vtd_find_as_by_sid_and_iommu_pasid, &key); > +} > + > static int vtd_sync_shadow_page_hook(const IOMMUTLBEvent *event, > void *private) > { Thanks Eric